📄 jishu.vht
字号:
WAIT FOR 568 ps;
CO1_expected <= '0';
WAIT FOR 20000 ps;
CO1_expected <= '1';
WAIT FOR 19244 ps;
CO1_expected <= '0';
WAIT;
END PROCESS t_prcs_CO1;
-- expected C[3]
t_prcs_C_3: PROCESS
BEGIN
C_expected(3) <= '0';
WAIT FOR 15999285 ps;
FOR i IN 1 TO 4
LOOP
C_expected(3) <= '1';
WAIT FOR 4000000 ps;
C_expected(3) <= '0';
WAIT FOR 16000000 ps;
END LOOP;
C_expected(3) <= '1';
WAIT FOR 4000000 ps;
C_expected(3) <= '0';
WAIT;
END PROCESS t_prcs_C_3;
-- expected C[2]
t_prcs_C_2: PROCESS
BEGIN
C_expected(2) <= '0';
WAIT FOR 7998850 ps;
FOR i IN 1 TO 4
LOOP
C_expected(2) <= '1';
WAIT FOR 8000000 ps;
C_expected(2) <= '0';
WAIT FOR 12000000 ps;
END LOOP;
C_expected(2) <= '1';
WAIT FOR 8000000 ps;
C_expected(2) <= '0';
WAIT;
END PROCESS t_prcs_C_2;
-- expected C[1]
t_prcs_C_1: PROCESS
BEGIN
C_expected(1) <= '0';
WAIT FOR 3997700 ps;
FOR i IN 1 TO 4
LOOP
C_expected(1) <= '1';
WAIT FOR 4000000 ps;
C_expected(1) <= '0';
WAIT FOR 4000000 ps;
C_expected(1) <= '1';
WAIT FOR 4000000 ps;
C_expected(1) <= '0';
WAIT FOR 8000000 ps;
END LOOP;
C_expected(1) <= '1';
WAIT FOR 4000000 ps;
C_expected(1) <= '0';
WAIT FOR 4000000 ps;
C_expected(1) <= '1';
WAIT FOR 4000000 ps;
C_expected(1) <= '0';
WAIT;
END PROCESS t_prcs_C_1;
-- expected C[0]
t_prcs_C_0: PROCESS
BEGIN
C_expected(0) <= '0';
WAIT FOR 1997299 ps;
FOR i IN 1 TO 24
LOOP
C_expected(0) <= '1';
WAIT FOR 2000000 ps;
C_expected(0) <= '0';
WAIT FOR 2000000 ps;
END LOOP;
C_expected(0) <= '1';
WAIT FOR 2000000 ps;
C_expected(0) <= '0';
WAIT;
END PROCESS t_prcs_C_0;
-- expected CO2
t_prcs_CO2: PROCESS
BEGIN
CO2_expected <= '0';
WAIT FOR 17998156 ps;
FOR i IN 1 TO 4
LOOP
CO2_expected <= '1';
WAIT FOR 1771 ps;
CO2_expected <= '0';
WAIT FOR 1600000 ps;
CO2_expected <= '1';
WAIT FOR 392 ps;
CO2_expected <= '0';
WAIT FOR 359796 ps;
CO2_expected <= '1';
WAIT FOR 568 ps;
CO2_expected <= '0';
WAIT FOR 20000 ps;
CO2_expected <= '1';
WAIT FOR 17473 ps;
CO2_expected <= '0';
WAIT FOR 18000000 ps;
END LOOP;
CO2_expected <= '1';
WAIT FOR 1771 ps;
CO2_expected <= '0';
WAIT FOR 1600000 ps;
CO2_expected <= '1';
WAIT FOR 392 ps;
CO2_expected <= '0';
WAIT FOR 359796 ps;
CO2_expected <= '1';
WAIT FOR 568 ps;
CO2_expected <= '0';
WAIT FOR 20000 ps;
CO2_expected <= '1';
WAIT FOR 17473 ps;
CO2_expected <= '0';
WAIT;
END PROCESS t_prcs_CO2;
-- expected D[3]
t_prcs_D_3: PROCESS
BEGIN
D_expected(3) <= '0';
WAIT;
END PROCESS t_prcs_D_3;
-- expected D[2]
t_prcs_D_2: PROCESS
BEGIN
D_expected(2) <= '0';
WAIT FOR 79998059 ps;
D_expected(2) <= '1';
WAIT;
END PROCESS t_prcs_D_2;
-- expected D[1]
t_prcs_D_1: PROCESS
BEGIN
D_expected(1) <= '0';
WAIT FOR 39999287 ps;
D_expected(1) <= '1';
WAIT FOR 40000000 ps;
D_expected(1) <= '0';
WAIT;
END PROCESS t_prcs_D_1;
-- expected D[0]
t_prcs_D_0: PROCESS
BEGIN
D_expected(0) <= '0';
WAIT FOR 19998841 ps;
FOR i IN 1 TO 2
LOOP
D_expected(0) <= '1';
WAIT FOR 20000000 ps;
D_expected(0) <= '0';
WAIT FOR 20000000 ps;
END LOOP;
D_expected(0) <= '1';
WAIT;
END PROCESS t_prcs_D_0;
-- expected CO3
t_prcs_CO3: PROCESS
BEGIN
CO3_expected <= '0';
WAIT;
END PROCESS t_prcs_CO3;
-- Set trigger on real/expected o/ pattern changes
t_prcs_trigger_e : PROCESS(A_expected,B_expected,C_expected,CO0_expected,CO1_expected,CO2_expected,CO3_expected,D_expected)
BEGIN
trigger_e <= NOT trigger_e;
END PROCESS t_prcs_trigger_e;
t_prcs_trigger_r : PROCESS(A,B,C,CO0,CO1,CO2,CO3,D)
BEGIN
trigger_r <= NOT trigger_r;
END PROCESS t_prcs_trigger_r;
t_prcs_selfcheck : PROCESS
VARIABLE i : INTEGER := 1;
VARIABLE txt : LINE;
VARIABLE last_A_exp : STD_LOGIC_VECTOR(3 DOWNTO 0) := "UUUU";
VARIABLE last_B_exp : STD_LOGIC_VECTOR(3 DOWNTO 0) := "UUUU";
VARIABLE last_C_exp : STD_LOGIC_VECTOR(3 DOWNTO 0) := "UUUU";
VARIABLE last_CO0_exp : STD_LOGIC := 'U';
VARIABLE last_CO1_exp : STD_LOGIC := 'U';
VARIABLE last_CO2_exp : STD_LOGIC := 'U';
VARIABLE last_CO3_exp : STD_LOGIC := 'U';
VARIABLE last_D_exp : STD_LOGIC_VECTOR(3 DOWNTO 0) := "UUUU";
VARIABLE on_first_change : trackvec := "11111111";
BEGIN
WAIT UNTIL (sampler'LAST_VALUE = '1'OR sampler'LAST_VALUE = '0')
AND sampler'EVENT;
IF (debug_tbench = '1') THEN
write(txt,string'("Scanning pattern "));
write(txt,i);
writeline(output,txt);
write(txt,string'("| expected "));write(txt,A_name);write(txt,string'(" = "));write(txt,A_expected_prev);
write(txt,string'("| expected "));write(txt,B_name);write(txt,string'(" = "));write(txt,B_expected_prev);
write(txt,string'("| expected "));write(txt,C_name);write(txt,string'(" = "));write(txt,C_expected_prev);
write(txt,string'("| expected "));write(txt,CO0_name);write(txt,string'(" = "));write(txt,CO0_expected_prev);
write(txt,string'("| expected "));write(txt,CO1_name);write(txt,string'(" = "));write(txt,CO1_expected_prev);
write(txt,string'("| expected "));write(txt,CO2_name);write(txt,string'(" = "));write(txt,CO2_expected_prev);
write(txt,string'("| expected "));write(txt,CO3_name);write(txt,string'(" = "));write(txt,CO3_expected_prev);
write(txt,string'("| expected "));write(txt,D_name);write(txt,string'(" = "));write(txt,D_expected_prev);
writeline(output,txt);
write(txt,string'("| real "));write(txt,A_name);write(txt,string'(" = "));write(txt,A_prev);
write(txt,string'("| real "));write(txt,B_name);write(txt,string'(" = "));write(txt,B_prev);
write(txt,string'("| real "));write(txt,C_name);write(txt,string'(" = "));write(txt,C_prev);
write(txt,string'("| real "));write(txt,CO0_name);write(txt,string'(" = "));write(txt,CO0_prev);
write(txt,string'("| real "));write(txt,CO1_name);write(txt,string'(" = "));write(txt,CO1_prev);
write(txt,string'("| real "));write(txt,CO2_name);write(txt,string'(" = "));write(txt,CO2_prev);
write(txt,string'("| real "));write(txt,CO3_name);write(txt,string'(" = "));write(txt,CO3_prev);
write(txt,string'("| real "));write(txt,D_name);write(txt,string'(" = "));write(txt,D_prev);
writeline(output,txt);
i := i + 1;
END IF;
IF ( A_expected_prev /= "XXXX" ) AND (A_expected_prev /= "UUUU" ) AND (A_prev /= A_expected_prev) AND (
(A_expected_prev /= last_A_exp) OR
(on_first_change(1) = '1')
) THEN
throw_error("A",A_expected_prev,A_prev);
num_mismatches(0) <= num_mismatches(0) + 1;
on_first_change(1) := '0';
last_A_exp := A_expected_prev;
END IF;
IF ( B_expected_prev /= "XXXX" ) AND (B_expected_prev /= "UUUU" ) AND (B_prev /= B_expected_prev) AND (
(B_expected_prev /= last_B_exp) OR
(on_first_change(2) = '1')
) THEN
throw_error("B",B_expected_prev,B_prev);
num_mismatches(1) <= num_mismatches(1) + 1;
on_first_change(2) := '0';
last_B_exp := B_expected_prev;
END IF;
IF ( C_expected_prev /= "XXXX" ) AND (C_expected_prev /= "UUUU" ) AND (C_prev /= C_expected_prev) AND (
(C_expected_prev /= last_C_exp) OR
(on_first_change(3) = '1')
) THEN
throw_error("C",C_expected_prev,C_prev);
num_mismatches(2) <= num_mismatches(2) + 1;
on_first_change(3) := '0';
last_C_exp := C_expected_prev;
END IF;
IF ( CO0_expected_prev /= 'X' ) AND (CO0_expected_prev /= 'U' ) AND (CO0_prev /= CO0_expected_prev) AND (
(CO0_expected_prev /= last_CO0_exp) OR
(on_first_change(4) = '1')
) THEN
throw_error("CO0",CO0_expected_prev,CO0_prev);
num_mismatches(3) <= num_mismatches(3) + 1;
on_first_change(4) := '0';
last_CO0_exp := CO0_expected_prev;
END IF;
IF ( CO1_expected_prev /= 'X' ) AND (CO1_expected_prev /= 'U' ) AND (CO1_prev /= CO1_expected_prev) AND (
(CO1_expected_prev /= last_CO1_exp) OR
(on_first_change(5) = '1')
) THEN
throw_error("CO1",CO1_expected_prev,CO1_prev);
num_mismatches(4) <= num_mismatches(4) + 1;
on_first_change(5) := '0';
last_CO1_exp := CO1_expected_prev;
END IF;
IF ( CO2_expected_prev /= 'X' ) AND (CO2_expected_prev /= 'U' ) AND (CO2_prev /= CO2_expected_prev) AND (
(CO2_expected_prev /= last_CO2_exp) OR
(on_first_change(6) = '1')
) THEN
throw_error("CO2",CO2_expected_prev,CO2_prev);
num_mismatches(5) <= num_mismatches(5) + 1;
on_first_change(6) := '0';
last_CO2_exp := CO2_expected_prev;
END IF;
IF ( CO3_expected_prev /= 'X' ) AND (CO3_expected_prev /= 'U' ) AND (CO3_prev /= CO3_expected_prev) AND (
(CO3_expected_prev /= last_CO3_exp) OR
(on_first_change(7) = '1')
) THEN
throw_error("CO3",CO3_expected_prev,CO3_prev);
num_mismatches(6) <= num_mismatches(6) + 1;
on_first_change(7) := '0';
last_CO3_exp := CO3_expected_prev;
END IF;
IF ( D_expected_prev /= "XXXX" ) AND (D_expected_prev /= "UUUU" ) AND (D_prev /= D_expected_prev) AND (
(D_expected_prev /= last_D_exp) OR
(on_first_change(8) = '1')
) THEN
throw_error("D",D_expected_prev,D_prev);
num_mismatches(7) <= num_mismatches(7) + 1;
on_first_change(8) := '0';
last_D_exp := D_expected_prev;
END IF;
trigger_i <= NOT trigger_i;
END PROCESS t_prcs_selfcheck;
t_prcs_trigger_res : PROCESS(trigger_e,trigger_i,trigger_r)
BEGIN
trigger <= trigger_i XOR trigger_e XOR trigger_r;
END PROCESS t_prcs_trigger_res;
t_prcs_endsim : PROCESS
VARIABLE txt : LINE;
VARIABLE total_mismatches : INTEGER := 0;
BEGIN
WAIT FOR 100000000 ps;
total_mismatches := num_mismatches(0) + num_mismatches(1) + num_mismatches(2) + num_mismatches(3) + num_mismatches(4) + num_mismatches(5) + num_mismatches(6) + num_mismatches(7);
IF (total_mismatches = 0) THEN
write(txt,string'("Simulation passed !"));
writeline(output,txt);
ELSE
write(txt,total_mismatches);
write(txt,string'(" mismatched vectors : Simulation failed !"));
writeline(output,txt);
END IF;
WAIT;
END PROCESS t_prcs_endsim;
END ovec_arch;
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY STD;
USE STD.textio.ALL;
USE WORK.JISHU_vhd_tb_types.ALL;
ENTITY JISHU_vhd_vec_tst IS
END JISHU_vhd_vec_tst;
ARCHITECTURE JISHU_arch OF JISHU_vhd_vec_tst IS
-- constants
-- signals
SIGNAL A : STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL B : STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL C : STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL clk : STD_LOGIC;
SIGNAL CO0 : STD_LOGIC;
SIGNAL CO1 : STD_LOGIC;
SIGNAL CO2 : STD_LOGIC;
SIGNAL CO3 : STD_LOGIC;
SIGNAL D : STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL sampler : sample_type;
COMPONENT JISHU
PORT (
A : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
B : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
C : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
clk : IN STD_LOGIC;
CO0 : OUT STD_LOGIC;
CO1 : OUT STD_LOGIC;
CO2 : OUT STD_LOGIC;
CO3 : OUT STD_LOGIC;
D : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT;
COMPONENT JISHU_vhd_check_tst
PORT (
A : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
B : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
C : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
CO0 : IN STD_LOGIC;
CO1 : IN STD_LOGIC;
CO2 : IN STD_LOGIC;
CO3 : IN STD_LOGIC;
D : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
sampler : IN sample_type
);
END COMPONENT;
COMPONENT JISHU_vhd_sample_tst
PORT (
clk : IN STD_LOGIC;
sampler : OUT sample_type
);
END COMPONENT;
BEGIN
i1 : JISHU
PORT MAP (
-- list connections between master ports and signals
A => A,
B => B,
C => C,
clk => clk,
CO0 => CO0,
CO1 => CO1,
CO2 => CO2,
CO3 => CO3,
D => D
);
-- clk
t_prcs_clk: PROCESS
BEGIN
LOOP
clk <= '0';
WAIT FOR 10000 ps;
clk <= '1';
WAIT FOR 10000 ps;
IF (NOW >= 100000000 ps) THEN WAIT; END IF;
END LOOP;
END PROCESS t_prcs_clk;
tb_sample : JISHU_vhd_sample_tst
PORT MAP (
clk => clk,
sampler => sampler
);
tb_out : JISHU_vhd_check_tst
PORT MAP (
A => A,
B => B,
C => C,
CO0 => CO0,
CO1 => CO1,
CO2 => CO2,
CO3 => CO3,
D => D,
sampler => sampler
);
END JISHU_arch;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -