📄 jishixianshi.vhd.bak
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY JISHIXIANSHI IS
PORT ( CLK0 , EN, RST : IN STD_LOGIC;
SG : OUT STD_LOGIC_VECTOR (6 DOWNTO 0);
SG1 : OUT STD_LOGIC_VECTOR (6 DOWNTO 0);
BT : OUT STD_LOGIC_VECTOR (3 DOWNTO 0)
);
END ENTITY JISHIXIANSHI ;
ARCHITECTURE one OF JISHIXIANSHI IS
COMPONENT JISHU
port
(
clk : IN STD_LOGIC;
CO0 : OUT STD_LOGIC;
CO1 : OUT STD_LOGIC;
CO2 : OUT STD_LOGIC;
CO3 : OUT STD_LOGIC;
A : OUT STD_LOGIC_VECTOR(3 downto 0);
B : OUT STD_LOGIC_VECTOR(3 downto 0);
C : OUT STD_LOGIC_VECTOR(3 downto 0);
D : OUT STD_LOGIC_VECTOR(3 downto 0)
);
END COMPONENT;
SIGNAL CNT10_1: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CNT10_2: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CNT10_3: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CNT10_4: STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL X : STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CNT4 : STD_LOGIC_VECTOR(1 DOWNTO 0);
SIGNAL clk1 : STD_LOGIC;
SIGNAL clk_counter:STD_LOGIC_VECTOR(1 DOWNTO 0);
BEGIN
u1 : JISHU PORT MAP (clk=>clk_counter(1),A=>CNT10_1,B=>CNT10_2,C=>CNT10_3,D=>CNT10_4);
clk_counter<="00";
clk1<='0';
P0: PROCESS(CLK0)
BEGIN
IF CLK0'EVENT AND CLK0 ='1' THEN clk_counter<=clk_counter+1;
END IF;
END PROCESS P0;
--P5: PROCESS(clk_counter)
-- BEGIN
-- CASE clk_counter IS
-- WHEN "11" => clk1<='1' ;
-- WHEN "10" => clk1<='1' ;
-- WHEN "01" => clk1<='0' ;
-- WHEN "00" => clk1<='0' ;
-- END CASE;
--
-- END PROCESS P5;
--
P1: PROCESS(CNT4)
BEGIN
CASE CNT4 IS
WHEN "00" => BT <="0001" ; X<=CNT10_1;
WHEN "01" => BT <="0010" ; X<=CNT10_2;
WHEN "10" => BT <="0100" ; X<=CNT10_3;
WHEN "11" => BT <="1000" ; X<=CNT10_4;
WHEN OTHERS => NULL;
END CASE;
END PROCESS P1;
P2:PROCESS(CLK0)
BEGIN
IF CLK0'EVENT AND CLK0 ='1' THEN CNT4<=CNT4+1;
END IF;
END PROCESS P2;
P3: PROCESS(X)
BEGIN
CASE X IS
WHEN "0000" => SG<="0111111";
WHEN "0001" => SG<="0000110";
WHEN "0010" => SG<="1011011";
WHEN "0011" => SG<="1001111";
WHEN "0100" => SG<="1100110";
WHEN "0101" => SG<="1101101";
WHEN "0110" => SG<="1111101";
WHEN "0111" => SG<="0000111";
WHEN "1000" => SG<="1111111";
WHEN "1001" => SG<="1101111";
WHEN "1010" => SG<="1110111";
WHEN "1011" => SG<="1111100";
WHEN "1100" => SG<="0111001";
WHEN "1101" => SG<="1011110";
WHEN "1110" => SG<="1111001";
WHEN "1111" => SG<="1110001";
WHEN OTHERS => NULL;
END CASE;
END PROCESS P3;
P4: PROCESS(X)
BEGIN
CASE X IS
WHEN "0000" => SG1<="0000000";
WHEN "0001" => SG1<="0000001";
WHEN "0010" => SG1<="0000010";
WHEN "0011" => SG1<="0000011";
WHEN "0100" => SG1<="0000100";
WHEN "0101" => SG1<="0000101";
WHEN "0110" => SG1<="0000110";
WHEN "0111" => SG1<="0000111";
WHEN "1000" => SG1<="0001000";
WHEN "1001" => SG1<="0001001";
WHEN "1010" => SG1<="0001010";
WHEN "1011" => SG1<="0001011";
WHEN "1100" => SG1<="0001100";
WHEN "1101" => SG1<="0001110";
WHEN "1110" => SG1<="0001111";
WHEN "1111" => SG1<="0010000";
WHEN OTHERS => NULL;
END CASE;
END PROCESS P4;
END ;
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