aaa3_8.tan.qmsg

基于quartus II软件 用verilog 语言描述的38译码器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Oct 14 16:25:26 2008 " "Info: Processing started: Tue Oct 14 16:25:26 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off aaa3_8 -c aaa3_8 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off aaa3_8 -c aaa3_8 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "in\[1\] out\[2\] 12.777 ns Longest " "Info: Longest tpd from source pin \"in\[1\]\" to destination pin \"out\[2\]\" is 12.777 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.832 ns) 0.832 ns in\[1\] 1 PIN PIN_M5 8 " "Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_M5; Fanout = 8; PIN Node = 'in\[1\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { in[1] } "NODE_NAME" } } { "aaa3_8.v" "" { Text "E:/quartus文档/aaa3_8/aaa3_8.v" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(5.950 ns) + CELL(0.150 ns) 6.932 ns Decoder0~71 2 COMB LCCOMB_X27_Y16_N12 1 " "Info: 2: + IC(5.950 ns) + CELL(0.150 ns) = 6.932 ns; Loc. = LCCOMB_X27_Y16_N12; Fanout = 1; COMB Node = 'Decoder0~71'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "6.100 ns" { in[1] Decoder0~71 } "NODE_NAME" } } { "aaa3_8.v" "" { Text "E:/quartus文档/aaa3_8/aaa3_8.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.037 ns) + CELL(2.808 ns) 12.777 ns out\[2\] 3 PIN PIN_A6 0 " "Info: 3: + IC(3.037 ns) + CELL(2.808 ns) = 12.777 ns; Loc. = PIN_A6; Fanout = 0; PIN Node = 'out\[2\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.845 ns" { Decoder0~71 out[2] } "NODE_NAME" } } { "aaa3_8.v" "" { Text "E:/quartus文档/aaa3_8/aaa3_8.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.790 ns ( 29.66 % ) " "Info: Total cell delay = 3.790 ns ( 29.66 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.987 ns ( 70.34 % ) " "Info: Total interconnect delay = 8.987 ns ( 70.34 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "12.777 ns" { in[1] Decoder0~71 out[2] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "12.777 ns" { in[1] {} in[1]~combout {} Decoder0~71 {} out[2] {} } { 0.000ns 0.000ns 5.950ns 3.037ns } { 0.000ns 0.832ns 0.150ns 2.808ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "115 " "Info: Allocated 115 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Oct 14 16:25:27 2008 " "Info: Processing ended: Tue Oct 14 16:25:27 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}