ac51_mul.v

Verilog 8051 IP Core for Cyclone II

//
// ac51_mul.v
//
// ac51 microcontroller core
//
// Version 0.6
//
// Copyright 2008, Hideyuki Abe. All rights reserved.
// Distributed under the terms of the MIT License.
//

module ac51_mul(
	ina,
	inb,
	out
);

input [7:0]	ina;
input [7:0]	inb;
output [15:0]	out;

assign	out = ina * inb;

endmodule

// End of ac51_mul.v