📄 xe1205driver.h
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#define RF_MC1_BAND_433 0x02
// Frequency deviation MSB
#define RF_MC1_FREQ_DEV_MSB_1 0x01
#define RF_MC1_FREQ_DEV_MSB_0 0x00
// MC Param 2
// Transceiver Frequency deviation
#define RF_MC2_FDEV_5 0x0A
#define RF_MC2_FDEV_10 0x14
#define RF_MC2_FDEV_20 0x28
#define RF_MC2_FDEV_40 0x50
#define RF_MC2_FDEV_55 0x6E
#define RF_MC2_FDEV_80 0xA0
#define RF_MC2_FDEV_100 0xC8
#define RF_MC2_FDEV_160 0x40 // RF_MC1_FREQ_DEV_MSB needs to be set
#define RF_MC2_FDEV_200 0x90 // RF_MC1_FREQ_DEV_MSB needs to be set
// MC Param 3
// Konnex mode enable
#define RF_MC3_KONNEX_ON 0x80
#define RF_MC3_KONNEX_OFF 0x00
// Transceiver Standard baudrate values
#define RF_MC3_BAUDRATE_1200 0x7E
#define RF_MC3_BAUDRATE_2400 0x3E
#define RF_MC3_BAUDRATE_4800 0x1F
#define RF_MC3_BAUDRATE_9600 0x0F
#define RF_MC3_BAUDRATE_19200 0x07
#define RF_MC3_BAUDRATE_38400 0x03
#define RF_MC3_BAUDRATE_76800 0x01
#define RF_MC3_BAUDRATE_153600 0x00
// IRQ Param 1
// Select RX IRQ_0 sources (Buffered mode)
#define RF_IRQ0_RX_IRQ_PATTERN 0xC0
#define RF_IRQ0_RX_IRQ_FIFO_EMPTY 0x80
#define RF_IRQ0_RX_IRQ_WRITE_BYTE 0x40
#define RF_IRQ0_RX_IRQ_OFF 0x00
// Select RX IRQ_0 sources (normal mode)
#define RF_IRQ0_RX_IRQ_RSSI 0x40
// Select RX IRQ_1 sources (Buffered mode)
#define RF_IRQ1_RX_IRQ_FIFO_FULL 0x10
#define RF_IRQ1_RX_IRQ_RSSI 0x20
#define RF_IRQ1_RX_IRQ_OFF 0x00
// Select TX IRQ_1 sources (Buffered mode)
#define RF_IRQ1_TX_IRQ_TX_STOPPED 0x08
#define RF_IRQ1_TX_IRQ_TX_FIFO_FULL 0x00
// FIFO overrun error
#define RF_IRQ1_FIFO_CLEAR 0x01
// IRQ Param 2
// FIFO filling selection mode
#define RF_IRQ2_START_FILL_ALWAYS 0x80
#define RF_IRQ2_START_FILL_PATTERN_DET 0x00
// Start of FIFO filling
#define RF_IRQ2_START_DETECT_CLEAR 0x40
#define RF_IRQ2_START_FILL_FIFO_START 0x40
#define RF_IRQ2_START_FILL_FIFO_STOP 0x00
// Tx stopped
//#define RF_IRQ2_TX_STTOPED 0x20
// Transmission FIFO behavior
#define RF_IRQ2_START_TX_FIFO_FULL 0x00
#define RF_IRQ2_START_TX_FIFO_NOT_EMPTY 0x10
// Enable interrupt SIGNAL_DETECT when RSSI_threshold is reached
#define RF_IRQ2_RSSI_IRQ_ON 0x08
#define RF_IRQ2_RSSI_IRQ_OFF 0x00
// Detection of a signal above the RSSI_thres
#define RF_IRQ2_RSSI_SIGNAL_DETECT_CLEAR 0x04
// RSSI threshold for interrupt
#define RF_IRQ2_RSSI_THRES_VTHR4 0x03
#define RF_IRQ2_RSSI_THRES_VTHR3 0x02
#define RF_IRQ2_RSSI_THRES_VTHR2 0x01
#define RF_IRQ2_RSSI_THRES_VTHR1 0x00
// TX Param 1
// Transmitter output power
#define RF_TX1_POWER_15 0xC0
#define RF_TX1_POWER_10 0x80
#define RF_TX1_POWER_5 0x40
#define RF_TX1_POWER_0 0x00
// Inhibition of the modulation in transmitter mode
#define RF_TX1_MODUL_ON 0x00
#define RF_TX1_MODUL_OFF 0x20
// Pre-filtering of the bit stream in transmitter mode
#define RF_TX1_FILTER_ON 0x10
#define RF_TX1_FILTER_OFF 0x00
//
#define RF_TX1_FIX_BSYNC_NOSY 0x02
#define RF_TX1_FIX_BSYNC_NORMAL 0x00
//
#define RF_TX1_SELECT_DEMOD_1 0x00
#define RF_TX1_SELECT_DEMOD_2 0x01
// RX Param 1
// Bit synchronizer
#define RF_RX1_BITSYNC_ON 0x00
#define RF_RX1_BITSYNC_OFF 0x80
// Bandwidth of the base band filter
#define RF_RX1_BW_200 0x60
#define RF_RX1_BW_40 0x40
#define RF_RX1_BW_20 0x20
#define RF_RX1_BW_10 0x00
// Forcing the bandwidth of the base band filter to
//it maximal value and disabling the regulation
#define RF_RX1_BW_MAX_ON 0x10
#define RF_RX1_BW_MAX_OFF 0x00
// Regulation of the bandwidth of the base band filter
#define RF_RX1_REG_BW_NOW 0x0C
#define RF_RX1_REG_BW_BB_FILTER_CHANGE 0x08
#define RF_RX1_REG_BW_OFF 0x04
#define RF_RX1_REG_BW_START_UP 0x00
// Boosting of the base band filter
#define RF_RX1_BOSST_FILTER_NOW 0x03
#define RF_RX1_BOSST_FILTER_BW_CHANGE 0x02
#define RF_RX1_BOSST_FILTER_OFF 0x01
#define RF_RX1_BOSST_FILTER_START_UP 0x00
// RX Param 2
// Enable RSSI
#define RF_RX2_RSSI_ON 0x80
#define RF_RX2_RSSI_OFF 0x00
// Range of the RSSI
#define RF_RX2_HIGH_RANGE 0x40
#define RF_RX2_LOW_RANGE 0x00
// Frequency Error Indicator ON/OFF
#define RF_RX2_FEI_ON 0x08
#define RF_RX2_FEI_OFF 0x00
// Start the Automatic Frequency Control process
#define RF_RX2_AFC_START 0x04
#define RF_RX2_AFC_STOP 0x00
// Disabling the AFC correction
#define RF_RX2_AFC_CORRECTION_ON 0x00
#define RF_RX2_AFC_CORRECTION_OFF 0x01
// RX Param 3
// AFC overflow indicator
#define RF_RX3_AFC_OVERFLOW_CLEAR 0x80
// IQ amplifiers
#define RF_RX3_IQAMP_ON 0x40
#define RF_RX3_IQAMP_OFF 0x00
// Linearity/Sensitivity mode
#define RF_RX3_RMODE_MODE_B 0x20
#define RF_RX3_RMODE_MODE_A 0x00
// Pattern recognition
#define RF_RX3_PATTERN_ON 0x10
#define RF_RX3_PATTERN_OFF 0x00
// Size of the reference pattern
#define RF_RX3_P_SIZE_32 0x0C
#define RF_RX3_P_SIZE_24 0x08
#define RF_RX3_P_SIZE_16 0x04
#define RF_RX3_P_SIZE_8 0x00
// Number of tolerated errors for the pattern recognition
#define RF_RX3_P_TOL_0 0x00
#define RF_RX3_P_TOL_1 0x01
#define RF_RX3_P_TOL_2 0x02
#define RF_RX3_P_TOL_3 0x03
// OSC Param 1
// Source of reference frequency
#define RF_OSC1_OSC_EXT 0x80
#define RF_OSC1_OSC_INT 0x00
// ClkOut enable
#define RF_OSC1_CLKOUT_ON 0x40
#define RF_OSC1_CLKOUT_OFF 0x00
// Frequency of ClkOut
#define RF_OSC1_CLK_FREQ_1_22_MHZ 0x00
#define RF_OSC1_CLK_FREQ_2_44_MHZ 0x08
#define RF_OSC1_CLK_FREQ_4_87_MHZ 0x10
#define RF_OSC1_CLK_FREQ_9_75_MHZ 0x18
#define RF_OSC1_CLK_FREQ_20_00_MHZ 0x20
// OSC Param 2
// Select the resistor value put between TKA and TKB
#define RF_OSC2_RES_X_OSC_3800 0x00
#define RF_OSC2_RES_X_OSC_1_48 0x10
#define RF_OSC2_RES_X_OSC_1_56 0x20
#define RF_OSC2_RES_X_OSC_1_66 0x30
#define RF_OSC2_RES_X_OSC_1_78 0x40
#define RF_OSC2_RES_X_OSC_1_91 0x50
#define RF_OSC2_RES_X_OSC_2_07 0x60
#define RF_OSC2_RES_X_OSC_2_26 0x70
#define RF_OSC2_RES_X_OSC_2_55 0x80
#define RF_OSC2_RES_X_OSC_2_81 0x90
#define RF_OSC2_RES_X_OSC_3_22 0xA0
#define RF_OSC2_RES_X_OSC_3_79 0xB0
#define RF_OSC2_RES_X_OSC_4_65 0xC0
#define RF_OSC2_RES_X_OSC_6_04 0xD0
#define RF_OSC2_RES_X_OSC_8_79 0xE0
#define RF_OSC2_RES_X_OSC_16_55 0xF0
/*******************************************************************
** Timings section : all timing described here are done with the **
** A&B counters cascaded **
*******************************************************************/
/*******************************************************************
** -- XE1205 Recommended timings -- **
********************************************************************
** These timings depends on the RC frequency **
** The following values corresponds to a 2.4576 MHz RC Freq **
** Times calculation formula **
** **
** CounterA&B value = RC * wanted time = 2 457 600 * 2 ms = 4915**
** **
*******************************************************************/
#define TS_OS 4915 // Quartz Osc Wake up time, 2 ms
#define TS_STR 860 // Transmitter wake-up time from OSC run, 350 us
#define TS_TR 369 // Transmitter wake-up time, 150 us
#define TS_SRE 2089 // Receiver wake-up time from OSC run, 850 us
#define TS_RE 1474 // Receiver wake-up time, 600 us
#define TS_RSSI 3686 // RSSI wake-up time, 1.5 ms
/*******************************************************************
** **
** 152340 **
** BitRate = ------------------- **
** (RegBr & 0x7F) + 1 **
** 2 2 * ((RegBr & 0x7F) + 1)**
** CounterA&B value = --------- * RC = ------------------------------ * RC
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