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📄 linux-2.6.28-sitsang.patch

📁 将linux-2.6.28版本的内核移植到arm公司的sitsang板上
💻 PATCH
📖 第 1 页 / 共 5 页
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diff -purN linux-2.6.28/arch/arm/boot/compressed/head-xscale.S linux-2.6.28-sitsang/arch/arm/boot/compressed/head-xscale.S--- linux-2.6.28/arch/arm/boot/compressed/head-xscale.S	2008-12-25 07:26:37.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/boot/compressed/head-xscale.S	2008-12-25 21:20:27.000000000 +0800@@ -38,4 +38,6 @@ __XScale_start: 		str	r1, [r0, #0x14] 		str	r1, [r0, #0x18] #endif-+#ifdef CONFIG_ARCH_SITSANG+	mov r7,#225+#endifdiff -purN linux-2.6.28/arch/arm/mach-pxa/include/mach/irqs.h linux-2.6.28-sitsang/arch/arm/mach-pxa/include/mach/irqs.h--- linux-2.6.28/arch/arm/mach-pxa/include/mach/irqs.h	2008-12-25 07:26:37.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/mach-pxa/include/mach/irqs.h	2008-12-25 21:28:31.000000000 +0800@@ -190,6 +190,8 @@ #define NR_IRQS			(IRQ_BOARD_END) #elif defined(CONFIG_MACH_ZYLONITE) #define NR_IRQS			(IRQ_BOARD_START + 32)+#elif defined(CONFIG_ARCH_SITSANG)+#define NR_IRQS             (IRQ_GPIO(85) + 1) #else #define NR_IRQS			(IRQ_BOARD_START) #endif@@ -267,3 +269,32 @@ #endif /* CONFIG_PCI_HOST_ITE8152 */  #endif /* __ASM_MACH_IRQS_H */++#if defined(CONFIG_ARCH_SITSANG)+ +#define SITSANG_IRQ(x)    (IRQ_GPIO(80) + 1 + (x))+ +#define SITSANG_CF_CARD_DETECT_IRQ                IRQ_GPIO(9)+#define SITSANG_CF_IRQ                            IRQ_GPIO(7)+#define SITSANG_USB_B_DETECT_IRQ                  IRQ_GPIO(9)+#define SITSANG_USB_HC_IRQ                        IRQ_GPIO(7)+#define SITSANG_RS232_DETECT_IRQ                  IRQ_GPIO(9)+#define SITSANG_SD_DETECT_IRQ                     IRQ_GPIO(9)+#define SITSANG_EXBD_DETECT_IRQ                   IRQ_GPIO(9)+#define SITSANG_JOYSTICK_IRQ                      IRQ_GPIO(4)+#define SITSANG_LAN_IRQ                           IRQ_GPIO(5)+#define SITSANG_BTUART_DETECT_IRQ                 IRQ_GPIO(9)+#define SITSANG_TOUCH_SCREEN_IRQ                  IRQ_GPIO(4)++#define SITSANG_CF_BVD1                           IRQ_GPIO(21)+#define SITSANG_CF_BVD2                           IRQ_GPIO(19)++#define SITSANG_IRQ(x)    (IRQ_GPIO(80) + 1 + (x))+++#define SITSANG_USB_HC1_OC_IRQ                    SITSANG_IRQ(0)+#define SITSANG_USB_HC2_OC_IRQ                    SITSANG_IRQ(1)+#define SITSANG_BATT_CHARGED_IRQ                  SITSANG_IRQ(2)+#define SITSANG_IRQ_COUNT                         3+	+#endifdiff -purN linux-2.6.28/arch/arm/mach-pxa/include/mach/sitsang.h linux-2.6.28-sitsang/arch/arm/mach-pxa/include/mach/sitsang.h--- linux-2.6.28/arch/arm/mach-pxa/include/mach/sitsang.h	1970-01-01 08:00:00.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/mach-pxa/include/mach/sitsang.h	2008-12-25 21:20:27.000000000 +0800@@ -0,0 +1,281 @@+/*+ *  linux/include/asm-arm/arch-pxa/sitsang.h+ *+ *  Author:	Alvin Tang+ *  Created:	Aug 12, 2002+ *  Copyright:	Intel China Ltd.+ *  + * This program is free software; you can redistribute it and/or modify+ * it under the terms of the GNU General Public License version 2 as+ * published by the Free Software Foundation.+ */+#include <video/lcdctrl.h>+#define SITSANG_FPGA_PHYS	PXA_CS2_PHYS	+#define SITSANG_FPGA_VIRT	(0xf0000000)	/* phys 0x08000000 */+#define SITSANG_ETH_BASE        (0xf1000000)    /* phys 0x04000000 */+#define SITSANG_ISP1161_BASE	(0xf4000000)	/* phys 0x10000000 */ /*David*/+#define SITSANG_P2V(x)		((x) - SITSANG_FPGA_PHYS + SITSANG_FPGA_VIRT)+#define SITSANG_V2P(x)		((x) - SITSANG_FPGA_VIRT + SITSANG_FPGA_PHYS)++#ifndef __ASSEMBLY__+#  define __SITSANG_REG(x)		(*((volatile unsigned long *)SITSANG_P2V(x)))+#else+#  define __SITSANG_REG(x)		SITSANG_P2V(x)+#endif++/* board level registers in the CPLD: (offsets from CPLD_BASE) */++#define SITSANG_PCR_RW_OFFSET                  0x00+#define SITSANG_BCR_RW_OFFSET                  0x04+#define SITSANG_BSR_RD_OFFSET                  0x08+#define SITSANG_BIPR_RW_OFFSET                 0x0C+#define SITSANG_BIMR_RW_OFFSET                 0x10+#define SITSANG_AXHR_RD_OFFSET                 0x14+#define SITSANG_AXLR_RD_OFFSET                 0x18+#define SITSANG_AYHR_RD_OFFSET                 0x1C+#define SITSANG_JSSR_RD_OFFSET                 0x20+#define SITSANG_LLEDR_RW_OFFSET                0x24+#define SITSANG_HLEDR_RW_OFFSET                0x28+#define SITSANG_EXBCR_RW_OFFSET                0x2C+#define SITSANG_EXBSR_RD_OFFSET                0x30+#define SITSANG_EXBIPR_RW_OFFSET               0x34+#define SITSANG_EXBIMR_RW_OFFSET               0x38++/* FPGA register physical addresses */+#define _SITSANG_PCR_RW		(SITSANG_FPGA_PHYS + SITSANG_PCR_RW_OFFSET)+#define _SITSANG_BCR_RW		(SITSANG_FPGA_PHYS + SITSANG_BCR_RW_OFFSET)+#define _SITSANG_BSR_RD 	(SITSANG_FPGA_PHYS + SITSANG_BSR_RD_OFFSET)+#define _SITSANG_BIPR_RW	(SITSANG_FPGA_PHYS + SITSANG_BIPR_RW_OFFSET)+#define _SITSANG_BIMR_RW 	(SITSANG_FPGA_PHYS + SITSANG_BIMR_RW_OFFSET)+#define _SITSANG_AXHR_RD	(SITSANG_FPGA_PHYS + SITSANG_AXHR_RD_OFFSET)+#define _SITSANG_AXLR_RD	(SITSANG_FPGA_PHYS + SITSANG_AXLR_RD_OFFSET)+#define _SITSANG_AYHR_RD 	(SITSANG_FPGA_PHYS + SITSANG_AYHR_RD_OFFSET)+#define _SITSANG_JSSR_RD	(SITSANG_FPGA_PHYS + SITSANG_JSSR_RD_OFFSET)+#define _SITSANG_LLEDR_RW	(SITSANG_FPGA_PHYS + SITSANG_LLEDR_RW_OFFSET)+#define _SITSANG_HLEDR_RW       (SITSANG_FPGA_PHYS + SITSANG_HLEDR_RW_OFFSET)+#define _SITSANG_EXBCR_RW       (SITSANG_FPGA_PHYS + SITSANG_EXBCR_RW_OFFSET)+#define _SITSANG_EXBSR_RD       (SITSANG_FPGA_PHYS + SITSANG_EXBSR_RD_OFFSET)	+#define _SITSANG_EXBIPR_RW      (SITSANG_FPGA_PHYS + SITSANG_EXBIPR_RW_OFFSET)+#define _SITSANG_EXBIMR_RW      (SITSANG_FPGA_PHYS + SITSANG_EXBIMR_RW_OFFSET)		+/* FPGA register virtual addresses */+#define SITSANG_PCR_RW	     	__SITSANG_REG(_SITSANG_PCR_RW)+#define SITSANG_BCR_RW          __SITSANG_REG(_SITSANG_BCR_RW)+#define SITSANG_BSR_RD          __SITSANG_REG(_SITSANG_BSR_RD)+#define SITSANG_BIPR_RW         __SITSANG_REG(_SITSANG_BIPR_RW)+#define SITSANG_BIMR_RW         __SITSANG_REG(_SITSANG_BIMR_RW)+#define SITSANG_AXHR_RD         __SITSANG_REG(_SITSANG_AXHR_RD)+#define SITSANG_AXLR_RD         __SITSANG_REG(_SITSANG_AXLR_RD)+#define SITSANG_AYHR_RD         __SITSANG_REG(_SITSANG_AYHR_RD)+#define SITSANG_JSSR_RD         __SITSANG_REG(_SITSANG_JSSR_RD)+#define SITSANG_LLEDR_RW        __SITSANG_REG(_SITSANG_LLEDR_RW)+#define SITSANG_HLEDR_RW        __SITSANG_REG(_SITSANG_HLEDR_RW)+#define SITSANG_EXBCR_RW        __SITSANG_REG(_SITSANG_EXBCR_RW)+#define SITSANG_EXBSR_RD	__SITSANG_REG(_SITSANG_EXBSR_RD)+#define SITSANG_EXBIPR_RW	__SITSANG_REG(_SITSANG_EXBIPR_RW)+#define SITSANG_EXBIMR_RW	__SITSANG_REG(_SITSANG_EXBIMR_RW)+		+/* FPGA register bit definition */+#define SITSANG_PCR_CF_ON               (0x1)+#define SITSANG_PCR_USB_HOST_ON         (0x1<<1)+#define SITSANG_PCR_RS232_ON            (0x1<<2)+#define SITSANG_PCR_BTUART_ON           (0x1<<3)+#define SITSANG_PCR_SD_ON               (0x1<<4)+#define SITSANG_PCR_ACC_ON              (0x1<<5)+#define SITSANG_PCR_LCD_ON              (0x1<<6)+#define SITSANG_PCR_LIGHT_ON            (0x1<<7)+#define SITSANG_PCR_IRDA_ON             (0x1<<8)+#define SITSANG_PCR_AUDIO_ON            (0x1<<9)+#define SITSANG_PCR_LAN_ON              (0x1<<10)+#define SITSANG_PCR_VCC_CHANGE_ON       (0x1<<11)+#define SITSANG_PCR_PER_ON              (0x1<<14)+#define SITSANG_PCR_SOFT_PWR_OFF        (0x1<<15)++#define SITSANG_BCR_FLASH_BO_WP         (0x1)+#define SITSANG_BCR_FLASH_B1_WP         (0x1<<1)+#define SITSANG_BCR_BUS_OPEN            (0x1<<2)+#define SITSANG_BCR_CF_RESET            (0x1<<3)+#define SITSANG_BCR_CF_CSEL             (0x1<<4)+#define SITSANG_BCR_USB_NDP             (0x1<<5)+#define SITSANG_BCR_USB_HC_RESET        (0x1<<6)+#define SITSANG_BCR_USB_HC_WAKE         (0x1<<7)+#define SITSANG_BCR_USB_DC_PULL_UP      (0x1<<8)+#define SITSANG_BCR_IR_MODE_L           (0x1<<9)+#define SITSANG_BCR_IR_MODE_H           (0x1<<10)+#define SITSANG_BCR_IR_FSEL             (0x1<<11)+#define SITSANG_BCR_LAN_RESET           (0x1<<12)+#define SITSANG_BCR_LAN_NEN16           (0x1<<13)+#define SITSANG_BCR_EXBD_USE_ECLK       (0x1<<14)+#define SITSANG_BCR_SYS_NRESET          (0x1<<15)++#define SITSANG_BSR_CF_VS1              (0x1)+#define SITSANG_BSR_SD_WP               (0x1<<1)+#define SITSANG_BSR_BOOTFROM_0          (0x1<<2)+#define SITSANG_BSR_USB_HC_SUSPEND      (0x1<<3)+#define SITSANG_BSR_TS_PEN_DOWN         (0x1<<4)+#define SITSANG_BSR_EXBD_INSERT         (0x1<<5)+#define SITSANG_BSR_USB_DC_INSERT       (0x1<<6)+#define SITSANG_BSR_CF_nIRQ_RDY_STATUS  (0x1<<7)+#define SITSANG_BSR_SMSC_nINT_STATUS    (0x1<<8)+#define SITSANG_BSR_USB_HC1_OC          (0x1<<9)+#define SITSANG_BSR_USB_HC2_OC          (0x1<<10)+#define SITSANG_BSR_BATT_CHARGING       (0x1<<11)+#define SITSANG_BSR_BTUART_INSERT       (0x1<<12)+#define SITSANG_BSR_RS232_INSERT        (0x1<<13)+#define SITSANG_BSR_CF_CARD_INSERT      (0x1<<14)+#define SITSANG_BSR_SD_INSERT           (0x1<<15)++#define	SITSANG_BIPR_CF_CARD_DETECT_IRQ (0x1)+#define SITSANG_BIPR_CF_IRQ		(0x1<<1)+#define SITSANG_BIPR_USB_B_DETECT_IRQ	(0x1<<2)+#define SITSANG_BIPR_RESERVED1_IRQ 	(0x1<<3)+#define SITSANG_BIPR_RESERVED2_IRQ      (0x1<<4)+#define SITSANG_BIPR_USB_HC1_OC_IRQ	(0x1<<5)+#define	SITSANG_BIPR_USB_HC2_OC_IRQ	(0x1<<6)+#define SITSANG_BIPR_USB_HC_IRQ		(0x1<<7)+#define SITSANG_BIPR_RS232_DETECT_IRQ	(0x1<<8)+#define SITSANG_BIPR_BTUART_DETECT_IRQ	(0x1<<9)+#define SITSANG_BIPR_EXBD_DETECT_IRQ	(0x1<<10)+#define	SITSANG_BIPR_SD_DETECT_IRQ	(0x1<<11)+#define SITSANG_BIPR_LAN_IRQ		(0x1<<12)+#define SITSANG_BIPR_JOYSTICK_IRQ	(0x1<<13)+#define SITSANG_BIPR_BATT_CHARGED_IRQ	(0x1<<14)+#define SITSANG_BIPR_TOUCH_SCREEN_IRQ	(0x1<<15)++ +#define SITSANG_BIMR_CF_CARD_DETECT_IRQ (0x1)+#define SITSANG_BIMR_CF_IRQ             (0x1<<1)+#define SITSANG_BIMR_USB_B_DETECT_IRQ   (0x1<<2)+#define SITSANG_BIMR_USB_RESERVED1_IRQ  (0x1<<3)+#define SITSANG_BIMR_USB_RESERVED2_IRQ  (0x1<<4)+#define SITSANG_BIMR_USB_HC1_OC_IRQ     (0x1<<5)+#define SITSANG_BIMR_USB_HC2_OC_IRQ     (0x1<<6)+#define SITSANG_BIMR_USB_HC_IRQ         (0x1<<7)+#define SITSANG_BIMR_RS232_DETECT_IRQ   (0x1<<8)+#define SITSANG_BIMR_BTUART_DETECT_IRQ  (0x1<<9)+#define SITSANG_BIMR_EXBD_DETECT_IRQ    (0x1<<10)+#define SITSANG_BIMR_SD_DETECT_IRQ      (0x1<<11)+#define SITSANG_BIMR_LAN_IRQ            (0x1<<12)+#define SITSANG_BIMR_JOYSTICK_IRQ       (0x1<<13)+#define SITSANG_BIMR_BATT_CHARGED_IRQ   (0x1<<14)+#define SITSANG_BIMR_TOUCH_SCREEN_IRQ   (0x1<<15)++#define SITSANG_JSSR_LEFT_SW 		(0x1)+#define SITSANG_JSSR_RIGHT_SW		(0x1<<1)+#define SITSANG_JSSR_TOP_SW   		(0x1<<2)+#define SITSANG_JSSR_BOTTOM_SW 		(0x1<<3)+#define SITSANG_JSSR_PUSH_SW 		(0x1<<4)+#define SITSANG_JSSR_SOFT_BTN_0		(0x1<<5)+#define SITSANG_JSSR_SOFT_BTN_1     	(0x1<<6)+#define SITSANG_JSSR_SOFT_GPIO_RST_BTN  (0x1<<7)+#define SITSANG_JSSR_HEX_SW0  		(0x1<<8)+#define SITSANG_JSSR_HEX_SW1  		(0x1<<9)+#define SITSANG_JSSR_HEX_SW2    	(0x1<<10)+#define SITSANG_JSSR_HEX_SW3      	(0x1<<11)+#define SITSANG_JSSR_RESERVED           (0x1<<12)+#define SITSANG_JSSR_RESERVED1       	(0x1<<13)+#define SITSANG_JSSR_RESERVED2   	(0x1<<14)+#define SITSANG_JSSR_RESERVED3   	(0x1<<15)++/* LEDS Matrix bit definition */+#define DISPLAY_0       0x0+#define DISPLAY_1       0x10+#define DISPLAY_2       0x100+#define DISPLAY_3       0x1000+#define DISPLAY_4       0x10000+#define DISPLAY_5       0x100000+#define DISPLAY_6       0x1000000+#define DISPLAY_7       0x10000000+#define DISPLAY_8       0x1+#define DISPLAY_9       0x11+#define DISPLAY_A       0x111+#define DISPLAY_B       0x1111+#define DISPLAY_C       0x11111+#define DISPLAY_D       0x111111+#define DISPLAY_E       0x1111111+#define DISPLAY_F       0x11111111++/* Add the bit definition for extend card here */++++/* GPIOs */++#define GPIO_SITSANG_IRQ	0+#define IRQ_GPIO_SITSANG_IRQ	IRQ_GPIO0+++/*+ * LED macros+ */+/* We only use the 0:7 bits of LLED for debug here */+#define SITSANG_LEDS_BASE SITSANG_LLEDR_RW++#define SITSANG_D28 0x1+#define SITSANG_D34 0x2+#define SITSANG_D21 0x4+#define SITSANG_D41 0x8+#define SITSANG_D47 0x10+#define SITSANG_D17 0x20+#define SITSANG_D39 0x40+#define SITSANG_D32 0x80+++#define SITSANG_HEARTBEAT_LED   SITSANG_D28+#define SITSANG_SYS_BUSY_LED    SITSANG_D34+#define SITSANG_HEXLEDS_BASE SITSANG_HLEDR_RW++#define SITSANG_HEARTBEAT_LED_OFF  (SITSANG_LEDS_BASE &= ~SITSANG_HEARTBEAT_LED)+#define SITSANG_HEARTBEAT_LED_ON   (SITSANG_LEDS_BASE |= SITSANG_HEARTBEAT_LED)+#define SITSANG_SYS_BUSY_LED_ON    (SITSANG_LEDS_BASE |= SITSANG_SYS_BUSY_LED)+#define SITSANG_SYS_BUSY_LED_OFF   (SITSANG_LEDS_BASE &= ~SITSANG_SYS_BUSY_LED)+++/*+ * use x = SITSANG_D21 + * SITSANG_D41 SITSANG_D47 SITSANG_D17 SITSANG_D39 SITSANG_D32 + * here, please...+ *+ */++#define SITSANG_DISCRETE_LED_ON(x)  (SITSANG_LEDS_BASE &= ~(x))+#define SITSANG_DISCRETE_LED_OFF(x) (SITSANG_LEDS_BASE |= (x))+ +#ifndef __ASSEMBLY__++#endif++#define SITSANG_BUMP_COUNTER (SITSANG_HEXLEDS_BASE = hexled_val++)+#define SITSANG_DEC_COUNTER (SITSANG_HEXLEDS_BASE = hexled_val--)++#define LCD_PIXCLOCK                    40000+#define LCD_BPP                         16+#define LCD_BPP_BITS			0x4	+#define LCD_XRES                        640+#define LCD_YRES                        480+#define LCD_HORIZONTAL_SYNC_PULSE_WIDTH 1 +#define LCD_VERTICAL_SYNC_PULSE_WIDTH   2+#define LCD_BEGIN_OF_LINE_WAIT_COUNT    2+#define LCD_BEGIN_FRAME_WAIT_COUNT      2+#define LCD_END_OF_LINE_WAIT_COUNT      96+#define LCD_END_OF_FRAME_WAIT_COUNT     208+#define LCD_SYNC                        (FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT)++#define LCD_LCCR0                       (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM | LCCR0_PAS | LCCR0_QDM | LCCR0_BM | LCCR0_OUM)+#define LCD_LCCR3                       (LCCR3_VSP | LCCR3_HSP | LCCR3_PCP | LCCR3_Bpp(LCD_BPP_BITS))++//#define CKEN16_LCD (1<<16)+#define CKEN16_LCD	(1 << 16)	/* LCD Unit Clock Enable */+#define CKEN14_I2C	(1 << 14)	/* I2C Unit Clock Enable */+#define CKEN13_FICP	(1 << 13)	/* FICP Unit Clock Enable */+#define CKEN12_MMC	(1 << 12)	/* MMC Unit Clock Enable */+#define CKEN11_USB	(1 << 11)	/* USB Unit Clock Enable */+#define CKEN8_I2S	(1 << 8)	/* I2S Unit Clock Enable */+#define CKEN7_BTUART	(1 << 7)	/* BTUART Unit Clock Enable */+#define CKEN6_FFUART	(1 << 6)	/* FFUART Unit Clock Enable */+#define CKEN5_STUART	(1 << 5)	/* STUART Unit Clock Enable */+#define CKEN3_SSP	(1 << 3)	/* SSP Unit Clock Enable */+#define CKEN2_AC97	(1 << 2)	/* AC97 Unit Clock Enable */+#define CKEN1_PWM1	(1 << 1)	/* PWM1 Clock Enable */+#define CKEN0_PWM0	(1 << 0)	/* PWM0 Clock Enable */++diff -purN linux-2.6.28/arch/arm/mach-pxa/Kconfig linux-2.6.28-sitsang/arch/arm/mach-pxa/Kconfig--- linux-2.6.28/arch/arm/mach-pxa/Kconfig	2008-12-25 07:26:37.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/mach-pxa/Kconfig	2008-12-25 21:25:56.000000000 +0800@@ -40,6 +40,9 @@ config ARCH_LUBBOCK 	select SA1111 	select PXA_HAVE_BOARD_IRQS +config ARCH_SITSANG+	bool "Intel SITSANG"+	select PXA25x config MACH_LOGICPD_PXA270 	bool "LogicPD PXA270 Card Engine Development Platform" 	select PXA27xdiff -purN linux-2.6.28/arch/arm/mach-pxa/leds.c linux-2.6.28-sitsang/arch/arm/mach-pxa/leds.c--- linux-2.6.28/arch/arm/mach-pxa/leds.c	2008-12-25 07:26:37.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/mach-pxa/leds.c	2008-12-25 21:30:02.000000000 +0800@@ -25,6 +25,8 @@ pxa_leds_init(void) 	if (machine_is_pxa_idp()) 		leds_event = idp_leds_event; +	if (machine_is_sitsang())+		leds_event = sitsang_leds_event; 	leds_event(led_start); 	return 0; }diff -purN linux-2.6.28/arch/arm/mach-pxa/leds.h linux-2.6.28-sitsang/arch/arm/mach-pxa/leds.h--- linux-2.6.28/arch/arm/mach-pxa/leds.h	2008-12-25 07:26:37.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/mach-pxa/leds.h	2008-12-25 21:20:27.000000000 +0800@@ -11,3 +11,4 @@ extern void idp_leds_event(led_event_t e extern void lubbock_leds_event(led_event_t evt); extern void mainstone_leds_event(led_event_t evt); extern void trizeps4_leds_event(led_event_t evt);+extern void sitsang_leds_event(led_event_t evt);diff -purN linux-2.6.28/arch/arm/mach-pxa/leds-sitsang.c linux-2.6.28-sitsang/arch/arm/mach-pxa/leds-sitsang.c--- linux-2.6.28/arch/arm/mach-pxa/leds-sitsang.c	1970-01-01 08:00:00.000000000 +0800+++ linux-2.6.28-sitsang/arch/arm/mach-pxa/leds-sitsang.c	2008-12-25 21:20:27.000000000 +0800@@ -0,0 +1,139 @@+/*+ * linux/arch/arm/mach-pxa/leds-sitsang.c+ *+ * Copyright (C) 2000 John Dorsey <john+@cs.cmu.edu>+ *+ * Copyright (c) 2001 Jeff Sutherland <jeffs@accelent.com>+ *+ * Copyright (c) 2002 Alvin Tang <alvin.tang@intel.com>+ * + * Original (ledsfootbridge.c) by Russell King+ *+ * See leds.h for bit definitions.  The first version defines D28 on the+ * Sitsang dev board as the heartbeat, and D34 as the Sys_busy led.+ * There's plenty more if you're interested in adding them :)+ */+++#include <linux/init.h>++#include <mach/hardware.h>+#include <asm/leds.h>+#include <asm/system.h>++#include <mach/sitsang.h>+#include <mach/pxa-regs.h>++#include "leds.h"+++#define LED_STATE_ENABLED	1+#define LED_STATE_CLAIMED	2++static unsigned int led_state;+static unsigned int hw_led_state;++void sitsang_leds_event(led_event_t evt)+{+	unsigned long flags;++	local_irq_save(flags);++	switch (evt) {+	case led_start:+		hw_led_state = SITSANG_HEARTBEAT_LED | SITSANG_SYS_BUSY_LED;+		led_state = LED_STATE_ENABLED;+		break;++	case led_stop:+		led_state &= ~LED_STATE_ENABLED;+		break;++	case led_claim:+		led_state |= LED_STATE_CLAIMED;+		hw_led_state = SITSANG_HEARTBEAT_LED | SITSANG_SYS_BUSY_LED;+		break;++	case led_release:+		led_state &= ~LED_STATE_CLAIMED;+		hw_led_state = SITSANG_HEARTBEAT_LED | SITSANG_SYS_BUSY_LED;+		break;++#ifdef CONFIG_LEDS_TIMER+	case led_timer:+		if (!(led_state & LED_STATE_CLAIMED))+			hw_led_state ^= SITSANG_HEARTBEAT_LED;+		break;+#endif++#ifdef CONFIG_LEDS_CPU+	case led_idle_start:+		if (!(led_state & LED_STATE_CLAIMED))+			hw_led_state |= SITSANG_SYS_BUSY_LED;+		break;++	case led_idle_end:+		if (!(led_state & LED_STATE_CLAIMED))+			hw_led_state &= ~SITSANG_SYS_BUSY_LED;+		break;+#endif++	case led_halted:+		break;++	case led_green_on:+		if (led_state & LED_STATE_CLAIMED)+			hw_led_state &= ~SITSANG_HEARTBEAT_LED;+		break;++	case led_green_off:+		if (led_state & LED_STATE_CLAIMED)+			hw_led_state |= SITSANG_HEARTBEAT_LED;

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