ia64-opc-m.c

xen 3.2.2 源码

    {"ldfpd.a.nta",	M2, OpMXX6aHint (6, 0, 1, 0x0b, 3), {F1, F2, MR3}, EMPTY},
    {"ldfp8.a",		M2, OpMXX6aHint (6, 0, 1, 0x09, 0), {F1, F2, MR3}, EMPTY},
    {"ldfp8.a.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x09, 1), {F1, F2, MR3}, EMPTY},
    {"ldfp8.a.nta",	M2, OpMXX6aHint (6, 0, 1, 0x09, 3), {F1, F2, MR3}, EMPTY},
    {"ldfps.sa",	M2, OpMXX6aHint (6, 0, 1, 0x0e, 0), {F1, F2, MR3}, EMPTY},
    {"ldfps.sa.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x0e, 1), {F1, F2, MR3}, EMPTY},
    {"ldfps.sa.nta",	M2, OpMXX6aHint (6, 0, 1, 0x0e, 3), {F1, F2, MR3}, EMPTY},
    {"ldfpd.sa",	M2, OpMXX6aHint (6, 0, 1, 0x0f, 0), {F1, F2, MR3}, EMPTY},
    {"ldfpd.sa.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x0f, 1), {F1, F2, MR3}, EMPTY},
    {"ldfpd.sa.nta",	M2, OpMXX6aHint (6, 0, 1, 0x0f, 3), {F1, F2, MR3}, EMPTY},
    {"ldfp8.sa",	M2, OpMXX6aHint (6, 0, 1, 0x0d, 0), {F1, F2, MR3}, EMPTY},
    {"ldfp8.sa.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x0d, 1), {F1, F2, MR3}, EMPTY},
    {"ldfp8.sa.nta",	M2, OpMXX6aHint (6, 0, 1, 0x0d, 3), {F1, F2, MR3}, EMPTY},
    {"ldfps.c.clr",	M2, OpMXX6aHint (6, 0, 1, 0x22, 0), {F1, F2, MR3}, EMPTY},
    {"ldfps.c.clr.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x22, 1), {F1, F2, MR3}, EMPTY},
    {"ldfps.c.clr.nta",	M2, OpMXX6aHint (6, 0, 1, 0x22, 3), {F1, F2, MR3}, EMPTY},
    {"ldfpd.c.clr",	M2, OpMXX6aHint (6, 0, 1, 0x23, 0), {F1, F2, MR3}, EMPTY},
    {"ldfpd.c.clr.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x23, 1), {F1, F2, MR3}, EMPTY},
    {"ldfpd.c.clr.nta",	M2, OpMXX6aHint (6, 0, 1, 0x23, 3), {F1, F2, MR3}, EMPTY},
    {"ldfp8.c.clr",	M2, OpMXX6aHint (6, 0, 1, 0x21, 0), {F1, F2, MR3}, EMPTY},
    {"ldfp8.c.clr.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x21, 1), {F1, F2, MR3}, EMPTY},
    {"ldfp8.c.clr.nta",	M2, OpMXX6aHint (6, 0, 1, 0x21, 3), {F1, F2, MR3}, EMPTY},
    {"ldfps.c.nc",	M2, OpMXX6aHint (6, 0, 1, 0x26, 0), {F1, F2, MR3}, EMPTY},
    {"ldfps.c.nc.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x26, 1), {F1, F2, MR3}, EMPTY},
    {"ldfps.c.nc.nta",	M2, OpMXX6aHint (6, 0, 1, 0x26, 3), {F1, F2, MR3}, EMPTY},
    {"ldfpd.c.nc",	M2, OpMXX6aHint (6, 0, 1, 0x27, 0), {F1, F2, MR3}, EMPTY},
    {"ldfpd.c.nc.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x27, 1), {F1, F2, MR3}, EMPTY},
    {"ldfpd.c.nc.nta",	M2, OpMXX6aHint (6, 0, 1, 0x27, 3), {F1, F2, MR3}, EMPTY},
    {"ldfp8.c.nc",	M2, OpMXX6aHint (6, 0, 1, 0x25, 0), {F1, F2, MR3}, EMPTY},
    {"ldfp8.c.nc.nt1",	M2, OpMXX6aHint (6, 0, 1, 0x25, 1), {F1, F2, MR3}, EMPTY},
    {"ldfp8.c.nc.nta",	M2, OpMXX6aHint (6, 0, 1, 0x25, 3), {F1, F2, MR3}, EMPTY},

    /* Floating-point load pair w/increment by immediate.  */
#define LD(a,b,c) M2, OpMXX6aHint (6, 1, 1, a, b), {F1, F2, MR3, c}, POSTINC, 0, NULL
    {"ldfps",		LD (0x02, 0, C8)},
    {"ldfps.nt1",	LD (0x02, 1, C8)},
    {"ldfps.nta",	LD (0x02, 3, C8)},
    {"ldfpd",		LD (0x03, 0, C16)},
    {"ldfpd.nt1",	LD (0x03, 1, C16)},
    {"ldfpd.nta",	LD (0x03, 3, C16)},
    {"ldfp8",		LD (0x01, 0, C16)},
    {"ldfp8.nt1",	LD (0x01, 1, C16)},
    {"ldfp8.nta",	LD (0x01, 3, C16)},
    {"ldfps.s",		LD (0x06, 0, C8)},
    {"ldfps.s.nt1",	LD (0x06, 1, C8)},
    {"ldfps.s.nta",	LD (0x06, 3, C8)},
    {"ldfpd.s",		LD (0x07, 0, C16)},
    {"ldfpd.s.nt1",	LD (0x07, 1, C16)},
    {"ldfpd.s.nta",	LD (0x07, 3, C16)},
    {"ldfp8.s",		LD (0x05, 0, C16)},
    {"ldfp8.s.nt1",	LD (0x05, 1, C16)},
    {"ldfp8.s.nta",	LD (0x05, 3, C16)},
    {"ldfps.a",		LD (0x0a, 0, C8)},
    {"ldfps.a.nt1",	LD (0x0a, 1, C8)},
    {"ldfps.a.nta",	LD (0x0a, 3, C8)},
    {"ldfpd.a",		LD (0x0b, 0, C16)},
    {"ldfpd.a.nt1",	LD (0x0b, 1, C16)},
    {"ldfpd.a.nta",	LD (0x0b, 3, C16)},
    {"ldfp8.a",		LD (0x09, 0, C16)},
    {"ldfp8.a.nt1",	LD (0x09, 1, C16)},
    {"ldfp8.a.nta",	LD (0x09, 3, C16)},
    {"ldfps.sa",	LD (0x0e, 0, C8)},
    {"ldfps.sa.nt1",	LD (0x0e, 1, C8)},
    {"ldfps.sa.nta",	LD (0x0e, 3, C8)},
    {"ldfpd.sa",	LD (0x0f, 0, C16)},
    {"ldfpd.sa.nt1",	LD (0x0f, 1, C16)},
    {"ldfpd.sa.nta",	LD (0x0f, 3, C16)},
    {"ldfp8.sa",	LD (0x0d, 0, C16)},
    {"ldfp8.sa.nt1",	LD (0x0d, 1, C16)},
    {"ldfp8.sa.nta",	LD (0x0d, 3, C16)},
    {"ldfps.c.clr",	LD (0x22, 0, C8)},
    {"ldfps.c.clr.nt1",	LD (0x22, 1, C8)},
    {"ldfps.c.clr.nta",	LD (0x22, 3, C8)},
    {"ldfpd.c.clr",	LD (0x23, 0, C16)},
    {"ldfpd.c.clr.nt1",	LD (0x23, 1, C16)},
    {"ldfpd.c.clr.nta",	LD (0x23, 3, C16)},
    {"ldfp8.c.clr",	LD (0x21, 0, C16)},
    {"ldfp8.c.clr.nt1",	LD (0x21, 1, C16)},
    {"ldfp8.c.clr.nta",	LD (0x21, 3, C16)},
    {"ldfps.c.nc",	LD (0x26, 0, C8)},
    {"ldfps.c.nc.nt1",	LD (0x26, 1, C8)},
    {"ldfps.c.nc.nta",	LD (0x26, 3, C8)},
    {"ldfpd.c.nc",	LD (0x27, 0, C16)},
    {"ldfpd.c.nc.nt1",	LD (0x27, 1, C16)},
    {"ldfpd.c.nc.nta",	LD (0x27, 3, C16)},
    {"ldfp8.c.nc",	LD (0x25, 0, C16)},
    {"ldfp8.c.nc.nt1",	LD (0x25, 1, C16)},
    {"ldfp8.c.nc.nta",	LD (0x25, 3, C16)},
#undef LD

    /* Line prefetch.  */
    {"lfetch",			M0, OpMXX6aHint (6, 0, 0, 0x2c, 0), {MR3}, EMPTY},
    {"lfetch.nt1",		M0, OpMXX6aHint (6, 0, 0, 0x2c, 1), {MR3}, EMPTY},
    {"lfetch.nt2",		M0, OpMXX6aHint (6, 0, 0, 0x2c, 2), {MR3}, EMPTY},
    {"lfetch.nta",		M0, OpMXX6aHint (6, 0, 0, 0x2c, 3), {MR3}, EMPTY},
    {"lfetch.excl",		M0, OpMXX6aHint (6, 0, 0, 0x2d, 0), {MR3}, EMPTY},
    {"lfetch.excl.nt1",		M0, OpMXX6aHint (6, 0, 0, 0x2d, 1), {MR3}, EMPTY},
    {"lfetch.excl.nt2",		M0, OpMXX6aHint (6, 0, 0, 0x2d, 2), {MR3}, EMPTY},
    {"lfetch.excl.nta",		M0, OpMXX6aHint (6, 0, 0, 0x2d, 3), {MR3}, EMPTY},
    {"lfetch.fault",		M0, OpMXX6aHint (6, 0, 0, 0x2e, 0), {MR3}, EMPTY},
    {"lfetch.fault.nt1",	M0, OpMXX6aHint (6, 0, 0, 0x2e, 1), {MR3}, EMPTY},
    {"lfetch.fault.nt2",	M0, OpMXX6aHint (6, 0, 0, 0x2e, 2), {MR3}, EMPTY},
    {"lfetch.fault.nta",	M0, OpMXX6aHint (6, 0, 0, 0x2e, 3), {MR3}, EMPTY},
    {"lfetch.fault.excl",	M0, OpMXX6aHint (6, 0, 0, 0x2f, 0), {MR3}, EMPTY},
    {"lfetch.fault.excl.nt1",	M0, OpMXX6aHint (6, 0, 0, 0x2f, 1), {MR3}, EMPTY},
    {"lfetch.fault.excl.nt2",	M0, OpMXX6aHint (6, 0, 0, 0x2f, 2), {MR3}, EMPTY},
    {"lfetch.fault.excl.nta",	M0, OpMXX6aHint (6, 0, 0, 0x2f, 3), {MR3}, EMPTY},

    /* Line prefetch w/increment by register.  */
#define LFETCHINCREG(c,h) M0, OpMXX6aHint (6, 1, 0, c, h), {MR3, R2}, POSTINC, 0, NULL
    {"lfetch",			LFETCHINCREG (0x2c, 0)},
    {"lfetch.nt1",		LFETCHINCREG (0x2c, 1)},
    {"lfetch.nt2",		LFETCHINCREG (0x2c, 2)},
    {"lfetch.nta",		LFETCHINCREG (0x2c, 3)},
    {"lfetch.excl",		LFETCHINCREG (0x2d, 0)},
    {"lfetch.excl.nt1",		LFETCHINCREG (0x2d, 1)},
    {"lfetch.excl.nt2",		LFETCHINCREG (0x2d, 2)},
    {"lfetch.excl.nta",		LFETCHINCREG (0x2d, 3)},
    {"lfetch.fault",		LFETCHINCREG (0x2e, 0)},
    {"lfetch.fault.nt1",	LFETCHINCREG (0x2e, 1)},
    {"lfetch.fault.nt2",	LFETCHINCREG (0x2e, 2)},
    {"lfetch.fault.nta",	LFETCHINCREG (0x2e, 3)},
    {"lfetch.fault.excl",	LFETCHINCREG (0x2f, 0)},
    {"lfetch.fault.excl.nt1",	LFETCHINCREG (0x2f, 1)},
    {"lfetch.fault.excl.nt2",	LFETCHINCREG (0x2f, 2)},
    {"lfetch.fault.excl.nta",	LFETCHINCREG (0x2f, 3)},
#undef LFETCHINCREG

    /* Semaphore operations.  */
    {"setf.sig",	M, OpMXX6a (6, 0, 1, 0x1c), {F1, R2}, EMPTY},
    {"setf.exp",	M, OpMXX6a (6, 0, 1, 0x1d), {F1, R2}, EMPTY},
    {"setf.s",		M, OpMXX6a (6, 0, 1, 0x1e), {F1, R2}, EMPTY},
    {"setf.d",		M, OpMXX6a (6, 0, 1, 0x1f), {F1, R2}, EMPTY},

    /* Floating-point load w/increment by immediate.  */
#define FLDINCIMMED(c,h) M, OpX6aHint (7, c, h), {F1, MR3, IMM9b}, POSTINC, 0, NULL
    {"ldfs",		FLDINCIMMED (0x02, 0)},
    {"ldfs.nt1",	FLDINCIMMED (0x02, 1)},
    {"ldfs.nta",	FLDINCIMMED (0x02, 3)},
    {"ldfd",		FLDINCIMMED (0x03, 0)},
    {"ldfd.nt1",	FLDINCIMMED (0x03, 1)},
    {"ldfd.nta",	FLDINCIMMED (0x03, 3)},
    {"ldf8",		FLDINCIMMED (0x01, 0)},
    {"ldf8.nt1",	FLDINCIMMED (0x01, 1)},
    {"ldf8.nta",	FLDINCIMMED (0x01, 3)},
    {"ldfe",		FLDINCIMMED (0x00, 0)},
    {"ldfe.nt1",	FLDINCIMMED (0x00, 1)},
    {"ldfe.nta",	FLDINCIMMED (0x00, 3)},
    {"ldfs.s",		FLDINCIMMED (0x06, 0)},
    {"ldfs.s.nt1",	FLDINCIMMED (0x06, 1)},
    {"ldfs.s.nta",	FLDINCIMMED (0x06, 3)},
    {"ldfd.s",		FLDINCIMMED (0x07, 0)},
    {"ldfd.s.nt1",	FLDINCIMMED (0x07, 1)},
    {"ldfd.s.nta",	FLDINCIMMED (0x07, 3)},
    {"ldf8.s",		FLDINCIMMED (0x05, 0)},
    {"ldf8.s.nt1",	FLDINCIMMED (0x05, 1)},
    {"ldf8.s.nta",	FLDINCIMMED (0x05, 3)},
    {"ldfe.s",		FLDINCIMMED (0x04, 0)},
    {"ldfe.s.nt1",	FLDINCIMMED (0x04, 1)},
    {"ldfe.s.nta",	FLDINCIMMED (0x04, 3)},
    {"ldfs.a",		FLDINCIMMED (0x0a, 0)},
    {"ldfs.a.nt1",	FLDINCIMMED (0x0a, 1)},
    {"ldfs.a.nta",	FLDINCIMMED (0x0a, 3)},
    {"ldfd.a",		FLDINCIMMED (0x0b, 0)},
    {"ldfd.a.nt1",	FLDINCIMMED (0x0b, 1)},
    {"ldfd.a.nta",	FLDINCIMMED (0x0b, 3)},
    {"ldf8.a",		FLDINCIMMED (0x09, 0)},
    {"ldf8.a.nt1",	FLDINCIMMED (0x09, 1)},
    {"ldf8.a.nta",	FLDINCIMMED (0x09, 3)},
    {"ldfe.a",		FLDINCIMMED (0x08, 0)},
    {"ldfe.a.nt1",	FLDINCIMMED (0x08, 1)},
    {"ldfe.a.nta",	FLDINCIMMED (0x08, 3)},
    {"ldfs.sa",		FLDINCIMMED (0x0e, 0)},
    {"ldfs.sa.nt1",	FLDINCIMMED (0x0e, 1)},
    {"ldfs.sa.nta",	FLDINCIMMED (0x0e, 3)},
    {"ldfd.sa",		FLDINCIMMED (0x0f, 0)},
    {"ldfd.sa.nt1",	FLDINCIMMED (0x0f, 1)},
    {"ldfd.sa.nta",	FLDINCIMMED (0x0f, 3)},
    {"ldf8.sa",		FLDINCIMMED (0x0d, 0)},
    {"ldf8.sa.nt1",	FLDINCIMMED (0x0d, 1)},
    {"ldf8.sa.nta",	FLDINCIMMED (0x0d, 3)},
    {"ldfe.sa",		FLDINCIMMED (0x0c, 0)},
    {"ldfe.sa.nt1",	FLDINCIMMED (0x0c, 1)},
    {"ldfe.sa.nta",	FLDINCIMMED (0x0c, 3)},
    {"ldf.fill",	FLDINCIMMED (0x1b, 0)},
    {"ldf.fill.nt1",	FLDINCIMMED (0x1b, 1)},
    {"ldf.fill.nta",	FLDINCIMMED (0x1b, 3)},
    {"ldfs.c.clr",	FLDINCIMMED (0x22, 0)},
    {"ldfs.c.clr.nt1",	FLDINCIMMED (0x22, 1)},
    {"ldfs.c.clr.nta",	FLDINCIMMED (0x22, 3)},
    {"ldfd.c.clr",	FLDINCIMMED (0x23, 0)},
    {"ldfd.c.clr.nt1",	FLDINCIMMED (0x23, 1)},
    {"ldfd.c.clr.nta",	FLDINCIMMED (0x23, 3)},
    {"ldf8.c.clr",	FLDINCIMMED (0x21, 0)},
    {"ldf8.c.clr.nt1",	FLDINCIMMED (0x21, 1)},
    {"ldf8.c.clr.nta",	FLDINCIMMED (0x21, 3)},
    {"ldfe.c.clr",	FLDINCIMMED (0x20, 0)},
    {"ldfe.c.clr.nt1",	FLDINCIMMED (0x20, 1)},
    {"ldfe.c.clr.nta",	FLDINCIMMED (0x20, 3)},
    {"ldfs.c.nc",	FLDINCIMMED (0x26, 0)},
    {"ldfs.c.nc.nt1",	FLDINCIMMED (0x26, 1)},
    {"ldfs.c.nc.nta",	FLDINCIMMED (0x26, 3)},
    {"ldfd.c.nc",	FLDINCIMMED (0x27, 0)},
    {"ldfd.c.nc.nt1",	FLDINCIMMED (0x27, 1)},
    {"ldfd.c.nc.nta",	FLDINCIMMED (0x27, 3)},
    {"ldf8.c.nc",	FLDINCIMMED (0x25, 0)},
    {"ldf8.c.nc.nt1",	FLDINCIMMED (0x25, 1)},
    {"ldf8.c.nc.nta",	FLDINCIMMED (0x25, 3)},
    {"ldfe.c.nc",	FLDINCIMMED (0x24, 0)},
    {"ldfe.c.nc.nt1",	FLDINCIMMED (0x24, 1)},
    {"ldfe.c.nc.nta",	FLDINCIMMED (0x24, 3)},
#undef FLDINCIMMED

    /* Floating-point store w/increment by immediate.  */
#define FSTINCIMMED(c,h) M, OpX6aHint (7, c, h), {MR3, F2, IMM9a}, POSTINC, 0, NULL
    {"stfs",		FSTINCIMMED (0x32, 0)},
    {"stfs.nta",	FSTINCIMMED (0x32, 3)},
    {"stfd",		FSTINCIMMED (0x33, 0)},
    {"stfd.nta",	FSTINCIMMED (0x33, 3)},
    {"stf8",		FSTINCIMMED (0x31, 0)},
    {"stf8.nta",	FSTINCIMMED (0x31, 3)},
    {"stfe",		FSTINCIMMED (0x30, 0)},
    {"stfe.nta",	FSTINCIMMED (0x30, 3)},
    {"stf.spill",	FSTINCIMMED (0x3b, 0)},
    {"stf.spill.nta",	FSTINCIMMED (0x3b, 3)},
#undef FSTINCIMMED

    /* Line prefetch w/increment by immediate.  */
#define LFETCHINCIMMED(c,h) M0, OpX6aHint (7, c, h), {MR3, IMM9b}, POSTINC, 0, NULL
    {"lfetch",			LFETCHINCIMMED (0x2c, 0)},
    {"lfetch.nt1",		LFETCHINCIMMED (0x2c, 1)},
    {"lfetch.nt2",		LFETCHINCIMMED (0x2c, 2)},
    {"lfetch.nta",		LFETCHINCIMMED (0x2c, 3)},
    {"lfetch.excl",		LFETCHINCIMMED (0x2d, 0)},
    {"lfetch.excl.nt1",		LFETCHINCIMMED (0x2d, 1)},
    {"lfetch.excl.nt2",		LFETCHINCIMMED (0x2d, 2)},
    {"lfetch.excl.nta",		LFETCHINCIMMED (0x2d, 3)},
    {"lfetch.fault",		LFETCHINCIMMED (0x2e, 0)},
    {"lfetch.fault.nt1",	LFETCHINCIMMED (0x2e, 1)},
    {"lfetch.fault.nt2",	LFETCHINCIMMED (0x2e, 2)},
    {"lfetch.fault.nta",	LFETCHINCIMMED (0x2e, 3)},
    {"lfetch.fault.excl",	LFETCHINCIMMED (0x2f, 0)},
    {"lfetch.fault.excl.nt1",	LFETCHINCIMMED (0x2f, 1)},
    {"lfetch.fault.excl.nt2",	LFETCHINCIMMED (0x2f, 2)},
    {"lfetch.fault.excl.nta",	LFETCHINCIMMED (0x2f, 3)},
#undef LFETCHINCIMMED

    {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
  };

#undef M0
#undef M
#undef M2
#undef bM
#undef bX
#undef bX2
#undef bX3
#undef bX4
#undef bX6a
#undef bX6b
#undef bHint
#undef mM
#undef mX
#undef mX2
#undef mX3
#undef mX4
#undef mX6a
#undef mX6b
#undef mHint
#undef OpX3
#undef OpX3X6b
#undef OpX3X4
#undef OpX3X4X2
#undef OpX6aHint
#undef OpXX6aHint
#undef OpMXX6a
#undef OpMXX6aHint
#undef EMPTY