ia64-opc-m.c

xen 3.2.2 源码

    {"ld2.c.clr.acq",	  M, OpMXX6aHint (4, 0, 0, 0x29, 0), {R1, MR3}, EMPTY},
    {"ld2.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x29, 1), {R1, MR3}, EMPTY},
    {"ld2.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x29, 3), {R1, MR3}, EMPTY},
    {"ld4.c.clr.acq",	  M, OpMXX6aHint (4, 0, 0, 0x2a, 0), {R1, MR3}, EMPTY},
    {"ld4.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2a, 1), {R1, MR3}, EMPTY},
    {"ld4.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2a, 3), {R1, MR3}, EMPTY},
    {"ld8.c.clr.acq",	  M, OpMXX6aHint (4, 0, 0, 0x2b, 0), {R1, MR3}, EMPTY},
    {"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY},
    {"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY},

    /* Pseudo-op that generates ldxmov relocation.  */
    {"ld8.mov",		M, OpMXX6aHint (4, 0, 0, 0x03, 0),
     {R1, MR3, IA64_OPND_LDXMOV}, EMPTY},

    /* Integer load w/increment by register.  */
#define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL
    {"ld1",		LDINCREG (0x00, 0)},
    {"ld1.nt1",		LDINCREG (0x00, 1)},
    {"ld1.nta",		LDINCREG (0x00, 3)},
    {"ld2",		LDINCREG (0x01, 0)},
    {"ld2.nt1",		LDINCREG (0x01, 1)},
    {"ld2.nta",		LDINCREG (0x01, 3)},
    {"ld4",		LDINCREG (0x02, 0)},
    {"ld4.nt1",		LDINCREG (0x02, 1)},
    {"ld4.nta",		LDINCREG (0x02, 3)},
    {"ld8",		LDINCREG (0x03, 0)},
    {"ld8.nt1",		LDINCREG (0x03, 1)},
    {"ld8.nta",		LDINCREG (0x03, 3)},
    {"ld1.s",		LDINCREG (0x04, 0)},
    {"ld1.s.nt1",	LDINCREG (0x04, 1)},
    {"ld1.s.nta",	LDINCREG (0x04, 3)},
    {"ld2.s",		LDINCREG (0x05, 0)},
    {"ld2.s.nt1",	LDINCREG (0x05, 1)},
    {"ld2.s.nta",	LDINCREG (0x05, 3)},
    {"ld4.s",		LDINCREG (0x06, 0)},
    {"ld4.s.nt1",	LDINCREG (0x06, 1)},
    {"ld4.s.nta",	LDINCREG (0x06, 3)},
    {"ld8.s",		LDINCREG (0x07, 0)},
    {"ld8.s.nt1",	LDINCREG (0x07, 1)},
    {"ld8.s.nta",	LDINCREG (0x07, 3)},
    {"ld1.a",		LDINCREG (0x08, 0)},
    {"ld1.a.nt1",	LDINCREG (0x08, 1)},
    {"ld1.a.nta",	LDINCREG (0x08, 3)},
    {"ld2.a",		LDINCREG (0x09, 0)},
    {"ld2.a.nt1",	LDINCREG (0x09, 1)},
    {"ld2.a.nta",	LDINCREG (0x09, 3)},
    {"ld4.a",		LDINCREG (0x0a, 0)},
    {"ld4.a.nt1",	LDINCREG (0x0a, 1)},
    {"ld4.a.nta",	LDINCREG (0x0a, 3)},
    {"ld8.a",		LDINCREG (0x0b, 0)},
    {"ld8.a.nt1",	LDINCREG (0x0b, 1)},
    {"ld8.a.nta",	LDINCREG (0x0b, 3)},
    {"ld1.sa",		LDINCREG (0x0c, 0)},
    {"ld1.sa.nt1",	LDINCREG (0x0c, 1)},
    {"ld1.sa.nta",	LDINCREG (0x0c, 3)},
    {"ld2.sa",		LDINCREG (0x0d, 0)},
    {"ld2.sa.nt1",	LDINCREG (0x0d, 1)},
    {"ld2.sa.nta",	LDINCREG (0x0d, 3)},
    {"ld4.sa",		LDINCREG (0x0e, 0)},
    {"ld4.sa.nt1",	LDINCREG (0x0e, 1)},
    {"ld4.sa.nta",	LDINCREG (0x0e, 3)},
    {"ld8.sa",		LDINCREG (0x0f, 0)},
    {"ld8.sa.nt1",	LDINCREG (0x0f, 1)},
    {"ld8.sa.nta",	LDINCREG (0x0f, 3)},
    {"ld1.bias",	LDINCREG (0x10, 0)},
    {"ld1.bias.nt1",	LDINCREG (0x10, 1)},
    {"ld1.bias.nta",	LDINCREG (0x10, 3)},
    {"ld2.bias",	LDINCREG (0x11, 0)},
    {"ld2.bias.nt1",	LDINCREG (0x11, 1)},
    {"ld2.bias.nta",	LDINCREG (0x11, 3)},
    {"ld4.bias",	LDINCREG (0x12, 0)},
    {"ld4.bias.nt1",	LDINCREG (0x12, 1)},
    {"ld4.bias.nta",	LDINCREG (0x12, 3)},
    {"ld8.bias",	LDINCREG (0x13, 0)},
    {"ld8.bias.nt1",	LDINCREG (0x13, 1)},
    {"ld8.bias.nta",	LDINCREG (0x13, 3)},
    {"ld1.acq",		LDINCREG (0x14, 0)},
    {"ld1.acq.nt1",	LDINCREG (0x14, 1)},
    {"ld1.acq.nta",	LDINCREG (0x14, 3)},
    {"ld2.acq",		LDINCREG (0x15, 0)},
    {"ld2.acq.nt1",	LDINCREG (0x15, 1)},
    {"ld2.acq.nta",	LDINCREG (0x15, 3)},
    {"ld4.acq",		LDINCREG (0x16, 0)},
    {"ld4.acq.nt1",	LDINCREG (0x16, 1)},
    {"ld4.acq.nta",	LDINCREG (0x16, 3)},
    {"ld8.acq",		LDINCREG (0x17, 0)},
    {"ld8.acq.nt1",	LDINCREG (0x17, 1)},
    {"ld8.acq.nta",	LDINCREG (0x17, 3)},
    {"ld8.fill",	LDINCREG (0x1b, 0)},
    {"ld8.fill.nt1",	LDINCREG (0x1b, 1)},
    {"ld8.fill.nta",	LDINCREG (0x1b, 3)},
    {"ld1.c.clr",	LDINCREG (0x20, 0)},
    {"ld1.c.clr.nt1",	LDINCREG (0x20, 1)},
    {"ld1.c.clr.nta",	LDINCREG (0x20, 3)},
    {"ld2.c.clr",	LDINCREG (0x21, 0)},
    {"ld2.c.clr.nt1",	LDINCREG (0x21, 1)},
    {"ld2.c.clr.nta",	LDINCREG (0x21, 3)},
    {"ld4.c.clr",	LDINCREG (0x22, 0)},
    {"ld4.c.clr.nt1",	LDINCREG (0x22, 1)},
    {"ld4.c.clr.nta",	LDINCREG (0x22, 3)},
    {"ld8.c.clr",	LDINCREG (0x23, 0)},
    {"ld8.c.clr.nt1",	LDINCREG (0x23, 1)},
    {"ld8.c.clr.nta",	LDINCREG (0x23, 3)},
    {"ld1.c.nc",	LDINCREG (0x24, 0)},
    {"ld1.c.nc.nt1",	LDINCREG (0x24, 1)},
    {"ld1.c.nc.nta",	LDINCREG (0x24, 3)},
    {"ld2.c.nc",	LDINCREG (0x25, 0)},
    {"ld2.c.nc.nt1",	LDINCREG (0x25, 1)},
    {"ld2.c.nc.nta",	LDINCREG (0x25, 3)},
    {"ld4.c.nc",	LDINCREG (0x26, 0)},
    {"ld4.c.nc.nt1",	LDINCREG (0x26, 1)},
    {"ld4.c.nc.nta",	LDINCREG (0x26, 3)},
    {"ld8.c.nc",	LDINCREG (0x27, 0)},
    {"ld8.c.nc.nt1",	LDINCREG (0x27, 1)},
    {"ld8.c.nc.nta",	LDINCREG (0x27, 3)},
    {"ld1.c.clr.acq",	  LDINCREG (0x28, 0)},
    {"ld1.c.clr.acq.nt1", LDINCREG (0x28, 1)},
    {"ld1.c.clr.acq.nta", LDINCREG (0x28, 3)},
    {"ld2.c.clr.acq",	  LDINCREG (0x29, 0)},
    {"ld2.c.clr.acq.nt1", LDINCREG (0x29, 1)},
    {"ld2.c.clr.acq.nta", LDINCREG (0x29, 3)},
    {"ld4.c.clr.acq",	  LDINCREG (0x2a, 0)},
    {"ld4.c.clr.acq.nt1", LDINCREG (0x2a, 1)},
    {"ld4.c.clr.acq.nta", LDINCREG (0x2a, 3)},
    {"ld8.c.clr.acq",	  LDINCREG (0x2b, 0)},
    {"ld8.c.clr.acq.nt1", LDINCREG (0x2b, 1)},
    {"ld8.c.clr.acq.nta", LDINCREG (0x2b, 3)},
#undef LDINCREG

    {"st1",		M, OpMXX6aHint (4, 0, 0, 0x30, 0), {MR3, R2}, EMPTY},
    {"st1.nta",		M, OpMXX6aHint (4, 0, 0, 0x30, 3), {MR3, R2}, EMPTY},
    {"st2",		M, OpMXX6aHint (4, 0, 0, 0x31, 0), {MR3, R2}, EMPTY},
    {"st2.nta",		M, OpMXX6aHint (4, 0, 0, 0x31, 3), {MR3, R2}, EMPTY},
    {"st4",		M, OpMXX6aHint (4, 0, 0, 0x32, 0), {MR3, R2}, EMPTY},
    {"st4.nta",		M, OpMXX6aHint (4, 0, 0, 0x32, 3), {MR3, R2}, EMPTY},
    {"st8",		M, OpMXX6aHint (4, 0, 0, 0x33, 0), {MR3, R2}, EMPTY},
    {"st8.nta",		M, OpMXX6aHint (4, 0, 0, 0x33, 3), {MR3, R2}, EMPTY},
    {"st16",		M, OpMXX6aHint (4, 0, 1, 0x30, 0), {MR3, R2, AR_CSD}, EMPTY},
    {"st16",		M, OpMXX6aHint (4, 0, 1, 0x30, 0), {MR3, R2}, PSEUDO, 0, NULL},
    {"st16.nta",	M, OpMXX6aHint (4, 0, 1, 0x30, 3), {MR3, R2, AR_CSD}, EMPTY},
    {"st16.nta",	M, OpMXX6aHint (4, 0, 1, 0x30, 3), {MR3, R2}, PSEUDO, 0, NULL},
    {"st1.rel",		M, OpMXX6aHint (4, 0, 0, 0x34, 0), {MR3, R2}, EMPTY},
    {"st1.rel.nta",	M, OpMXX6aHint (4, 0, 0, 0x34, 3), {MR3, R2}, EMPTY},
    {"st2.rel",		M, OpMXX6aHint (4, 0, 0, 0x35, 0), {MR3, R2}, EMPTY},
    {"st2.rel.nta",	M, OpMXX6aHint (4, 0, 0, 0x35, 3), {MR3, R2}, EMPTY},
    {"st4.rel",		M, OpMXX6aHint (4, 0, 0, 0x36, 0), {MR3, R2}, EMPTY},
    {"st4.rel.nta",	M, OpMXX6aHint (4, 0, 0, 0x36, 3), {MR3, R2}, EMPTY},
    {"st8.rel",		M, OpMXX6aHint (4, 0, 0, 0x37, 0), {MR3, R2}, EMPTY},
    {"st8.rel.nta",	M, OpMXX6aHint (4, 0, 0, 0x37, 3), {MR3, R2}, EMPTY},
    {"st16.rel",	M, OpMXX6aHint (4, 0, 1, 0x34, 0), {MR3, R2, AR_CSD}, EMPTY},
    {"st16.rel",	M, OpMXX6aHint (4, 0, 1, 0x34, 0), {MR3, R2}, PSEUDO, 0, NULL},
    {"st16.rel.nta",	M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2, AR_CSD}, EMPTY},
    {"st16.rel.nta",	M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2}, PSEUDO, 0, NULL},
    {"st8.spill",	M, OpMXX6aHint (4, 0, 0, 0x3b, 0), {MR3, R2}, EMPTY},
    {"st8.spill.nta",	M, OpMXX6aHint (4, 0, 0, 0x3b, 3), {MR3, R2}, EMPTY},

#define CMPXCHG(c,h)	M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CCV}, EMPTY
#define CMPXCHG_P(c,h)	M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL
#define CMPXCHG16(c,h)	M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CSD, AR_CCV}, EMPTY
#define CMPXCHG16_P(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL
#define CMPXCHG_acq 0
#define CMPXCHG_rel 4
#define CMPXCHG_1 0
#define CMPXCHG_2 1
#define CMPXCHG_4 2
#define CMPXCHG_8 3
#define CMPXCHGn(n, s) \
    {"cmpxchg"#n"."#s,       CMPXCHG   (CMPXCHG_##n|CMPXCHG_##s, 0)}, \
    {"cmpxchg"#n"."#s,       CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 0)}, \
    {"cmpxchg"#n"."#s".nt1", CMPXCHG   (CMPXCHG_##n|CMPXCHG_##s, 1)}, \
    {"cmpxchg"#n"."#s".nt1", CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 1)}, \
    {"cmpxchg"#n"."#s".nta", CMPXCHG   (CMPXCHG_##n|CMPXCHG_##s, 3)}, \
    {"cmpxchg"#n"."#s".nta", CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 3)}
#define CMP8XCHG16(s) \
    {"cmp8xchg16."#s,       CMPXCHG16   (0x20|CMPXCHG_##s, 0)}, \
    {"cmp8xchg16."#s,       CMPXCHG16_P (0x20|CMPXCHG_##s, 0)}, \
    {"cmp8xchg16."#s".nt1", CMPXCHG16   (0x20|CMPXCHG_##s, 1)}, \
    {"cmp8xchg16."#s".nt1", CMPXCHG16_P (0x20|CMPXCHG_##s, 1)}, \
    {"cmp8xchg16."#s".nta", CMPXCHG16   (0x20|CMPXCHG_##s, 3)}, \
    {"cmp8xchg16."#s".nta", CMPXCHG16_P (0x20|CMPXCHG_##s, 3)}
#define CMPXCHG_ALL(s) CMPXCHGn(1, s), \
                       CMPXCHGn(2, s), \
                       CMPXCHGn(4, s), \
                       CMPXCHGn(8, s), \
                       CMP8XCHG16(s)
    CMPXCHG_ALL(acq),
    CMPXCHG_ALL(rel),
#undef CMPXCHG
#undef CMPXCHG_P
#undef CMPXCHG16
#undef CMPXCHG16_P
#undef CMPXCHG_acq
#undef CMPXCHG_rel
#undef CMPXCHG_1
#undef CMPXCHG_2
#undef CMPXCHG_4
#undef CMPXCHG_8
#undef CMPXCHGn
#undef CMPXCHG16
#undef CMPXCHG_ALL
    {"xchg1",		  M, OpMXX6aHint (4, 0, 1, 0x08, 0), {R1, MR3, R2}, EMPTY},
    {"xchg1.nt1",	  M, OpMXX6aHint (4, 0, 1, 0x08, 1), {R1, MR3, R2}, EMPTY},
    {"xchg1.nta",	  M, OpMXX6aHint (4, 0, 1, 0x08, 3), {R1, MR3, R2}, EMPTY},
    {"xchg2",		  M, OpMXX6aHint (4, 0, 1, 0x09, 0), {R1, MR3, R2}, EMPTY},
    {"xchg2.nt1",	  M, OpMXX6aHint (4, 0, 1, 0x09, 1), {R1, MR3, R2}, EMPTY},
    {"xchg2.nta",	  M, OpMXX6aHint (4, 0, 1, 0x09, 3), {R1, MR3, R2}, EMPTY},
    {"xchg4",		  M, OpMXX6aHint (4, 0, 1, 0x0a, 0), {R1, MR3, R2}, EMPTY},
    {"xchg4.nt1",	  M, OpMXX6aHint (4, 0, 1, 0x0a, 1), {R1, MR3, R2}, EMPTY},
    {"xchg4.nta",	  M, OpMXX6aHint (4, 0, 1, 0x0a, 3), {R1, MR3, R2}, EMPTY},
    {"xchg8",		  M, OpMXX6aHint (4, 0, 1, 0x0b, 0), {R1, MR3, R2}, EMPTY},
    {"xchg8.nt1",	  M, OpMXX6aHint (4, 0, 1, 0x0b, 1), {R1, MR3, R2}, EMPTY},
    {"xchg8.nta",	  M, OpMXX6aHint (4, 0, 1, 0x0b, 3), {R1, MR3, R2}, EMPTY},

    {"fetchadd4.acq",	  M, OpMXX6aHint (4, 0, 1, 0x12, 0), {R1, MR3, INC3}, EMPTY},
    {"fetchadd4.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x12, 1), {R1, MR3, INC3}, EMPTY},
    {"fetchadd4.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x12, 3), {R1, MR3, INC3}, EMPTY},
    {"fetchadd8.acq",	  M, OpMXX6aHint (4, 0, 1, 0x13, 0), {R1, MR3, INC3}, EMPTY},
    {"fetchadd8.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x13, 1), {R1, MR3, INC3}, EMPTY},
    {"fetchadd8.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x13, 3), {R1, MR3, INC3}, EMPTY},
    {"fetchadd4.rel",	  M, OpMXX6aHint (4, 0, 1, 0x16, 0), {R1, MR3, INC3}, EMPTY},
    {"fetchadd4.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x16, 1), {R1, MR3, INC3}, EMPTY},
    {"fetchadd4.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x16, 3), {R1, MR3, INC3}, EMPTY},
    {"fetchadd8.rel",	  M, OpMXX6aHint (4, 0, 1, 0x17, 0), {R1, MR3, INC3}, EMPTY},
    {"fetchadd8.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x17, 1), {R1, MR3, INC3}, EMPTY},
    {"fetchadd8.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x17, 3), {R1, MR3, INC3}, EMPTY},

    {"getf.sig",	  M, OpMXX6a (4, 0, 1, 0x1c), {R1, F2}, EMPTY},
    {"getf.exp",	  M, OpMXX6a (4, 0, 1, 0x1d), {R1, F2}, EMPTY},
    {"getf.s",		  M, OpMXX6a (4, 0, 1, 0x1e), {R1, F2}, EMPTY},
    {"getf.d",		  M, OpMXX6a (4, 0, 1, 0x1f), {R1, F2}, EMPTY},

    /* Integer load w/increment by immediate.  */
#define LDINCIMMED(c,h) M, OpX6aHint (5, c, h), {R1, MR3, IMM9b}, POSTINC, 0, NULL
    {"ld1",		LDINCIMMED (0x00, 0)},
    {"ld1.nt1",		LDINCIMMED (0x00, 1)},
    {"ld1.nta",		LDINCIMMED (0x00, 3)},
    {"ld2",		LDINCIMMED (0x01, 0)},
    {"ld2.nt1",		LDINCIMMED (0x01, 1)},
    {"ld2.nta",		LDINCIMMED (0x01, 3)},
    {"ld4",		LDINCIMMED (0x02, 0)},
    {"ld4.nt1",		LDINCIMMED (0x02, 1)},
    {"ld4.nta",		LDINCIMMED (0x02, 3)},
    {"ld8",		LDINCIMMED (0x03, 0)},
    {"ld8.nt1",		LDINCIMMED (0x03, 1)},
    {"ld8.nta",		LDINCIMMED (0x03, 3)},
    {"ld1.s",		LDINCIMMED (0x04, 0)},
    {"ld1.s.nt1",	LDINCIMMED (0x04, 1)},
    {"ld1.s.nta",	LDINCIMMED (0x04, 3)},
    {"ld2.s",		LDINCIMMED (0x05, 0)},
    {"ld2.s.nt1",	LDINCIMMED (0x05, 1)},
    {"ld2.s.nta",	LDINCIMMED (0x05, 3)},
    {"ld4.s",		LDINCIMMED (0x06, 0)},
    {"ld4.s.nt1",	LDINCIMMED (0x06, 1)},
    {"ld4.s.nta",	LDINCIMMED (0x06, 3)},
    {"ld8.s",		LDINCIMMED (0x07, 0)},
    {"ld8.s.nt1",	LDINCIMMED (0x07, 1)},
    {"ld8.s.nta",	LDINCIMMED (0x07, 3)},
    {"ld1.a",		LDINCIMMED (0x08, 0)},
    {"ld1.a.nt1",	LDINCIMMED (0x08, 1)},
    {"ld1.a.nta",	LDINCIMMED (0x08, 3)},
    {"ld2.a",		LDINCIMMED (0x09, 0)},
    {"ld2.a.nt1",	LDINCIMMED (0x09, 1)},
    {"ld2.a.nta",	LDINCIMMED (0x09, 3)},
    {"ld4.a",		LDINCIMMED (0x0a, 0)},
    {"ld4.a.nt1",	LDINCIMMED (0x0a, 1)},
    {"ld4.a.nta",	LDINCIMMED (0x0a, 3)},
    {"ld8.a",		LDINCIMMED (0x0b, 0)},
    {"ld8.a.nt1",	LDINCIMMED (0x0b, 1)},
    {"ld8.a.nta",	LDINCIMMED (0x0b, 3)},
    {"ld1.sa",		LDINCIMMED (0x0c, 0)},
    {"ld1.sa.nt1",	LDINCIMMED (0x0c, 1)},
    {"ld1.sa.nta",	LDINCIMMED (0x0c, 3)},
    {"ld2.sa",		LDINCIMMED (0x0d, 0)},
    {"ld2.sa.nt1",	LDINCIMMED (0x0d, 1)},
    {"ld2.sa.nta",	LDINCIMMED (0x0d, 3)},
    {"ld4.sa",		LDINCIMMED (0x0e, 0)},
    {"ld4.sa.nt1",	LDINCIMMED (0x0e, 1)},
    {"ld4.sa.nta",	LDINCIMMED (0x0e, 3)},
    {"ld8.sa",		LDINCIMMED (0x0f, 0)},
    {"ld8.sa.nt1",	LDINCIMMED (0x0f, 1)},