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/***************Voiceband Control Register*************************/
/******************************************************************/
#define VCR_MASK 0xF
#define VCR_IN_SADR 0x0
#define VCR_OUT_SADR 0x200
#define VCR_mode_SADR 0x400
#define VCR_AMPCTRL_SADR 0x600
#define VCR_RXpath_SADR 0x800
#define VCR_TXpath_SADR 0xA00
#define VCR_ASI_SADR 0xC00
#define VCR_MICHI_SADR 0xE00
/******************************************************************/
/***************Power Control Register*************************/
/******************************************************************/
#define PCR_MASK 0x1
#define PCR_DAC1_SADR 0x100
#define PCR_DAC2_SADR 0x200
#define PCR_DAC3_SADR 0x300
#define PCR_VBT_SADR 0x400
#define PCR_VBR_SADR 0x500
#define PCR_Vref_SADR 0x600
#define PCR_device_SADR 0xF00
/******************************************************************/
/***************RAM Interface Register*****************************/
/******************************************************************/
#define RIR_MASK 0x3FF
#define RIR_LOW_SADR 0x000
#define RIR_HIGH_SADR 0x400
#define RIR_PROG_SADR 0x800
#define RIR_IN_SADR 0xC00
#define RIR_PROG_ZERO 0x0
/* +LMSdv97702 - 09/10/03 - SCH */
/*======================================================================*/
/* Constant used for BAI registers reading */
/*======================================================================*/
#define BAI_REG_ADR_MASK 0xF0
#define BAI_REG_ADR_OFFSET 4
#define BAI_AUXADC1A_ADR 0x05
#define BAI_AUXADC1B_ADR 0x06
#define BAI_AUXADC2_ADR 0x07
#define BAI_AUXADC3_ADR 0x08
#define BAI_AUXADC4_ADR 0x09
#define BAI_DATA_MASK 0x1FFF00
#define BAI_DATA_OFFSET 8
/* -LMSdv97702 - 09/10/03 - SCH */
/*====================================================================*/
/* */
/* Other general defines for 50732 */
/* */
/*====================================================================*/
#define BAI_DAC3_ON 0x1 /*0x301*/
#define BAI_DAC3_OFF 0x0 /*0x300*/
#define POWER_DOWN 0x0
#define POWER_UP 0x1
#define PCF_ADR 0x9
#define PCF_IMC_SEL 0x5
#define PCF_MODE_0 0x0
#define CODEC_EN PCF_IMC_SEL
#define IMC_WORD_NEXT IMC_WORD_FIRST
#define IMC_WORD_FIRST ((DSP_PCF5073_SP<<26)|(PCF_MODE_0<<24)|\
(PCF_IMC_SEL<<21)|( BAI_BCR_ADR<<4)|PCF_ADR)
/*====================================================================*/
/* */
/* AUDIO MANAGEMENT */
/* */
/*====================================================================*/
/* general defines for VBvol register */
#define BAI_SIDE_MUTE 0
/* Voiceband Tuning */
#define BAI_TUNE_00 0x03 /* Analog gain 0 dBm */
#define BAI_TUNE_25 0x02 /* Analog gain -2.5 dBm */
#define BAI_TUNE_60 0x01 /* Analog gain -6 dBm */
#define BAI_TUNE_85 0x00 /* Analog gain -8.5 dBm */
#define BAI_VB_CHOP 0x04 /* Voiceband chopping */
/* general defines for VBcontr register */
#define BAI_AUDIO_IN_MIC 0x00 /* Input source = MICAMP */
#define BAI_AUDIO_IN_AUX 0x01 /* Input source = AUXMIC */
#define BAI_AUDIO_OUT_OFF 0x00 /* Output amplifier = OFF */
#define BAI_AUDIO_OUT_EAR 0x03 /* Output amplifier = EARAMP */
#define BAI_AUDIO_OUT_AUX 0x04 /* Output amplifier = AUXAMP */
#define BAI_AUDIO_OUT_BUZ 0x08 /* Output amplifier = BUZAMP */
#define BAI_MODE_SINGLE 0x00 /* Single ended earamp output */
#define BAI_MODE_DIFF 0x01 /* Differential earamp output */
#define BAI_MICHI_7DB 0x00 /* TX gain boost (MICHI) = 7dB */
#define BAI_MICHI_35DB 0x01 /* TX gain boost (MICHI) = 35dB */
#define BAI_AMPCTRL_LOW 0x00 /* AmpCtrl pin is at Low level */
#define BAI_AMPCTRL_HIGH 0x01 /* AmpCtrl pin is at High level */
#define BAI_MAX_LENGTH_SCI 40
/*====================================================================*/
/* */
/* ACCESORY and other modes Management */
/* */
/*====================================================================*/
/*======================================================================*/
/* PATCH AUDIO CLAC */
/*======================================================================*/
/* begin LMSdv85170 - 17/04/03 - PYQ */
#if defined PR_85170
#define BAI_WAIT_FRAME_LATER 2
#define BAI_TIMER_ON_AUDIO_CLOSING 2
#define BAI_MSGID_AUDIO_OFF 5
#else
#define BAI_WAIT_FRAME_LATER 1
#define BAI_NB_FRAME_BEFORE_ALLOW_SLEEP 3
#endif /*PR_85170*/
/* end LMSdv85170 */
#define BAI_MAX_LENGTH_SCI_LATER 10
/*======================================================================*/
/* PATCH for DAC1 sleep mode management */
/*======================================================================*/
/* begin LMSdv85776 - 17/04/03 - PYQ */
#if defined PR_85776
#define BAI_TIMER_ON_DAC1_WRITING 2
#define BAI_MSGID_DAC1_WRITING 6
#endif /*PR_85776*/
/* end LMSdv85776 */
/*----------------------------------------------------------------------*/
/* ADC IN BURST */
/*----------------------------------------------------------------------*/
#define BAI_ADC1A 4
/*----------------------------------------------------------------------*/
/* general defines for control register block */
/*----------------------------------------------------------------------*/
#define AUDIO_NORMAL 0
#define AUDIO_HEADSET 1
#define AUDIO_EASY_FDCK 2
#define AUDIO_SMART_FDCK 3
#define AUDIO_COMPACT_HDCK 4
#define AUDIO_HANDSFREE 5
#define AUDIO_MP3 6
#define AUDIO_BLUETOOTH 7
#if defined(BAI_PORTABLE_CAR_KIT_HDW)
#define AUDIO_PORTABLE 9
#endif
/* Begin LMSdv84589 - 24/04/03 - C. DOUMENC */
#ifdef CR_84589
#define AUDIO_HEADSET_2 10
#endif
/* End LMSdv84589 */
/* use for initialisation of v_bai_AudioMode to avoid problem in case */
/* of reconf after BD */
#define AUDIO_UNKNOW 10
#define AD_LEVEL_0 0 /* -30.10dB */
#define AD_LEVEL_1 1 /* -24.08dB */
#define AD_LEVEL_2 2 /* -18.06dB */
#define AD_LEVEL_3 3 /* -12.04dB */
#define AD_LEVEL_4 4 /* -8.52dB */
#define AD_LEVEL_5 5 /* -6.02dB */
#define AD_LEVEL_6 6 /* -3.25dB */
#define AD_LEVEL_7 7 /* 0 db */
#define AD_LEVEL_8 8 /* 2.96 dB */
#define AD_LEVEL_9 9 /* 5.88 dB */
#define AD_TONE_CHANNEL_ALL 0
#define AD_TONE_CHANNEL_1 1
#define AD_TONE_CHANNEL_2 2
#define AD_TONE_CHANNEL_3 3
#endif
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