reg5087.ho

这是用Labwindows开发的一个RF test程序。 用于日本机种的组装后ANT 测试。

#define PIO0		( BIT0  )        
#define PIO1	        ( BIT1  )        
#define PIO2	        ( BIT2  )        
#define PIO3	        ( BIT3  )        
#define PIO4	        ( BIT4  )        
#define PIO5	        ( BIT5  )        
#define PIO6	        ( BIT6  )        
#define PIO7	        ( BIT7  )        
#define PIO8	        ( BIT8  )        
#define PIO9	        ( BIT9  )       
#define PIO10	        ( BIT10 )     
#define PIO11	        ( BIT11 )    
#define PIO12	        ( BIT12 )
#define DSP_EMUL_MODE   ( BIT13 )

#define OUT_PIO0        ( BIT0  )       
#define OUT_PIO1        ( BIT1  )        
#define OUT_PIO2        ( BIT2  )        
#define OUT_PIO3        ( BIT3  )        
#define OUT_PIO4        ( BIT4  )        
#define OUT_PIO5        ( BIT5  )        
#define OUT_PIO6        ( BIT6  )        
#define OUT_PIO7        ( BIT7  )        
#define OUT_PIO8        ( BIT8  )        
#define OUT_PIO9        ( BIT9  )        
#define OUT_PIO10       ( BIT10 )        
#define OUT_PIO11       ( BIT11 )        
#define OUT_PIO12       ( BIT12 )        


/**********************************************************************/

/*----------*/
/* EMI UNIT */
/*----------*/

#if defined (__arm)  || defined(_LABWIN32) || defined(__BORLANDC__)
#define	PCF5087_SYSCON	*( ( volatile u8 *) (0xFFFF8003) )   /* SYStem CONtrol register */
#endif

/* PCF5087_SYSCON */

#define	STEAL_MODE	        ZEROS               	/* cycle steal mode */
#define	FAIR_MODE	        (          BIT0 ) 	/* fair arbitration mode */
#define	DMA_MODE        	(  BIT1         ) 	/* DMA high speed mode*/
#define	LOW_PRIO_DMA_MODE       (  BIT1 |  BIT0 ) 	/* Low priority DMA mode */
#define	SHEN                    ( BIT2 )	        /* show cycle mode enabled */
#define	FBC                     ( BIT3 )	        /* fast bus mode */
#define	BPE                     ( BIT6 )	        /* bus pull up enabled */


/* MEMCTRL register */

#if defined (__arm)  || defined(_LABWIN32) || defined(__BORLANDC__)
#define	PCF5087_MEMCTRL	*( ( volatile u8 *) (0xFFFF8017) )   /* MEMory ConTRoL register */
#endif

                                    
/* CHIP-SELECT REGISTER */

#if defined (__arm)  || defined(_LABWIN32) || defined(__BORLANDC__)
#define	PCF5087_CS0N	*( ( volatile u16 *) (0xFFFF8006) )   /* CHIP select 0 control register */
#define	PCF5087_CS1N	*( ( volatile u16 *) (0xFFFF800A) )   /* CHIP select 1 control register */
#define	PCF5087_CS2N	*( ( volatile u16 *) (0xFFFF800E) )   /* CHIP select 2 control register */
#define	PCF5087_CS3N	*( ( volatile u16 *) (0xFFFF8012) )   /* CHIP select 3 control register */
#endif

/* PCF5087_CSxN */

/* bus mode */
#define	CS_16_DEVICE1	        ZEROS                   	/* 16 bits device */
#define	CS_8_DEVICE2	        (                    BIT11)	/* 8 bits device */
#define	CS_16_OR_8_DEVICE3	(           BIT12         )	/* 16 bits or two 8 bits device two low active CS*/
#define	CS_16_OR_8_DEVICE4	(           BIT12 |  BIT11)	/* 16 bits or two 8 bits device one low and one high active CS */
#define	CS_8_LOW_DEVICE5	(  BIT13                  )	/* 8 bits device as low byte memory */
#define	CS_8_HIGH_DEVICE6	(  BIT13          |  BIT11)	/* 8 bits device as high byte memory */

/* block size selection for bus device 1*/
#define	CS_DEVICE1_256KB	ZEROS	                        /* select 256 KiloBytes size for Chip Select */
#define	CS_DEVICE1_512KB	(           BIT14 )        	/* select 512 KiloBytes size for Chip Select */
#define	CS_DEVICE1_1MB   	(  BIT15          )        	/* select   1 MegaBytes size for Chip Select */
#define	CS_DEVICE1_2MB  	(  BIT15 |  BIT14 )	        /* select   2 MegaBytes size for Chip Select */
/* LMSdv85950 - 04/06/03 - tcmc_wbm */
#define CS_DEVICE1_8MB  	(  BIT15          )	        /* ONLY FOR PCF50874-5 !! select   8 MegaBytes size for Chip Select */
/* End LMSdv85950 */
															 
/* block size selection for bus device 2*/										 
#define	CS_DEVICE2_128KB	ZEROS		                /* select 128 KiloBytes size for Chip Select */
#define	CS_DEVICE2_256KB	(           BIT14 )		/* select 256 KiloBytes size for Chip Select */
#define	CS_DEVICE2_512KB	(  BIT15          )		/* select 512 KiloBytes size for Chip Select */
#define	CS_DEVICE2_1MB		(  BIT15 |  BIT14 )		/* select   1 MegaBytes size for Chip Select */
															 
/* block size selection for bus device 3*/										 
#define	CS_DEVICE3_64KB		ZEROS	                	/* select  64 KiloBytes size for Chip Select */
#define	CS_DEVICE3_128KB	(           BIT14 )		/* select 128 KiloBytes size for Chip Select */
#define	CS_DEVICE3_256KB	(  BIT15          )		/* select 256 KiloBytes size for Chip Select */
#define	CS_DEVICE3_512KB	(  BIT15 |  BIT14 )		/* select 512 KiloBytes size for Chip Select */
/* LMSdv93358 - 05/08/03 - tcmc_wbm */
/* LMSdv85950 - 07/05/03 - tcmc_wbm */
/*#define	CS_DEVICE3_1MB    ZEROS*/                   /* select 1 MegaBytes size for Extended Mode */
#define	CS_DEVICE3_1MB      (           BIT14 )     /* select 1 MegaBytes size for Extended Mode */
/* End LMSdv85950 */
/* End LMSdv93358 */

/* block size selection for bus device 4*/										 
#define	CS_DEVICE4_64KB		ZEROS	          		/* select  64 KiloBytes size for Chip Select */
#define	CS_DEVICE4_128KB	(           BIT14 )		/* select 128 KiloBytes size for Chip Select */
#define	CS_DEVICE4_256KB	(  BIT15          )		/* select 256 KiloBytes size for Chip Select */
#define	CS_DEVICE4_512KB	(  BIT15 |  BIT14 )		/* select 512 KiloBytes size for Chip Select */
															 
/* block size selection for bus device 5*/										 
#define	CS_DEVICE5_128KB	ZEROS	          		/* select 128 KiloBytes size for Chip Select */
#define	CS_DEVICE5_256KB	(           BIT14 )		/* select 256 KiloBytes size for Chip Select */
#define	CS_DEVICE5_512KB	(  BIT15          )		/* select 512 KiloBytes size for Chip Select */
#define	CS_DEVICE5_1MB		(  BIT15 |  BIT14 )		/* select   1 MegaBytes size for Chip Select */
															 
/* block size selection for bus device 6*/										 
#define	CS_DEVICE6_128KB	ZEROS	          		/* select 128 KiloBytes size for Chip Select */
#define	CS_DEVICE6_256KB	(           BIT14 )		/* select 256 KiloBytes size for Chip Select */
#define	CS_DEVICE6_512KB	(  BIT15          )		/* select 512 KiloBytes size for Chip Select */
#define	CS_DEVICE6_1MB		(  BIT15 |  BIT14 )		/* select   1 MegaBytes size for Chip Select */


/* R/W access selection */
#define	CS_RO	ZEROS	          	/* Read Only access  */
#define	CS_WO	(  BIT10         )	/* Write Only access  */
#define CS_RW	(  BIT10 |  BIT9 )	/* RESET STATE, Read & Write access */

	
/* decoded base address (only 8 MB addressable)*/
#define	CS_BA_000000H	0x0000		/* select address      0 for chip select, use with | */
#define	CS_BA_80000H	0x0020		/* select address  80000 for chip select, use with | */
#define	CS_BA_100000H	0x0040		/* select address 100000 for chip select, use with | */
#define	CS_BA_180000H	0x0060		/* select address 180000 for chip select, use with | */
#define	CS_BA_200000H	0x0080		/* select address 200000 for chip select, use with | */
#define	CS_BA_280000H	0x00A0		/* select address 280000 for chip select, use with | */
#define	CS_BA_300000H	0x00C0		/* select address 300000 for chip select, use with | */
#define	CS_BA_380000H	0x00E0		/* select address 380000 for chip select, use with | */
#define	CS_BA_400000H	0x0100		/* select address 400000 for chip select, use with | */
#define	CS_BA_480000H	0x0120		/* select address 480000 for chip select, use with | */
#define	CS_BA_500000H	0x0140		/* select address 500000 for chip select, use with | */
#define	CS_BA_580000H	0x0160		/* select address 580000 for chip select, use with | */
#define	CS_BA_600000H	0x0180		/* select address 600000 for chip select, use with | */
#define	CS_BA_680000H	0x01A0		/* select address 680000 for chip select, use with | */
#define	CS_BA_700000H	0x01C0		/* select address 700000 for chip select, use with | */
#define	CS_BA_780000H	0x01E0		/* select address 780000 for chip select, use with | */
/* LMSdv85950 - 07/05/03 - tcmc_wbm */
#define	CS_BA_1300000H	0x0098      /* select address 1300000 for chip select, use with | FOR EXTENDED MEMORY */
#define CS_BA_2000000H  0x0100      /* select address 2000000 for chip select */
#define CS_BA_3000000H  0x0180      /* select address 3000000 for chip select */
/* End LMSdv85950 */

/* wait state */
#define	CS_0_WS		ZEROS                     	/* no wait state */
#define	CS_1_WS		(                  BIT0  )   	/* one wait states */
#define	CS_2_WS		(          BIT1          )   	/* two wait states */
#define CS_3_WS		(          BIT1 |  BIT0  )   	/* three wait states */
#define CS_4_WS		(  BIT2                  )      /* for wait states */
#define	CS_5_WS		(  BIT2         |  BIT0  )   	/* five wait states */
#define CS_6_WS		(  BIT2 |  BIT1          )      /* six wait states */
#define CS_7_WS		(  BIT2 |  BIT1 |  BIT0  )      /* RESET STATE - seven wait states */


/**********************************************************************/

/*-----------*/
/* PDCU UNIT */
/*-----------*/

#if defined (__arm) || defined(_LABWIN32) || defined(__BORLANDC__)
#define	PCF5087_PDCUC	*( ( volatile u16 *) (0xFFFF9502) )
#define	PCF5087_GPON0	*( ( volatile u8  *) (0xFFFF9507) )
#define	PCF5087_GPON1	*( ( volatile u8  *) (0xFFFF950B) )
#define	PCF5087_GPON2	*( ( volatile u8  *) (0xFFFF950F) )
#define	PCF5087_CGUC	*( ( volatile u16 *) (0xFFFF9512) )   /* clock generation unit control register */
#define PCF5087_QBC     *( ( volatile u16 *) (0xFFFF9602) )
#endif
#define PSM    ( BIT10 )

/* clock for SC core, DSP core, DSP I/O units and independent units */
#define OPCLK_26MHZ     ZEROS            
#define OPCLK_19_5MHZ   (        BIT0 )         
#define OPCLK_13MHZ     ( BIT1        )   
#define OPCLK_6_5MHZ    ( BIT1 | BIT0 ) 

/* clock for SC I/O units */
#define SICLK0_2        ZEROS                    
#define SICLK0_3        (        BIT2 )            
#define SICLK0_4        ( BIT3        )            
#define SICLK0_6        ( BIT3 | BIT2 )          

/* clock for UART1 */
#define SICLK1_OFF      ZEROS            
#define SICLK1_1        (        BIT4 )			   
#define SICLK1_2        ( BIT5        )			   
#define SICLK1_6        ( BIT5 | BIT4 )			   

/* clock for PWM */
#define SICLK2_OFF      ZEROS            
#define SICLK2_ON       ( BIT6 )            

/* operation clock frequency for SIM unit */
#define SIMU_CLK_OFF    ZEROS            
#define SIMU_CLK_ON     ( BIT7 )            
     
/* status of the line PLL_LOCK_N */
#define PLL_LOCKED      ( BIT8 )

/* clock for SC */
#define SCPCLK_MASK     ( BIT12 | BIT11 )
#define SCCLK_3_25MHZ           ZEROS
#define SCCLK_6_5MHZ            (         BIT11 )
#define SCCLK_13MHZ             ( BIT12         )
#define SCCLK_26MHZ             ( BIT12 | BIT11 )

/* clock for DSP */
#define DSPCLK_MASK     ( BIT14 | BIT13 )
#define DSPCLK_52MHZ             ZEROS