91x_scu.c

STR912 arm9实现的以太网通信程序

/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
* File Name          : 91x_scu.c
* Author             : MCD Application Team
* Version            : V2.0
* Date               : 12/07/2007
* Description        : This file provides the SCU library firmware functions
********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/

/* Includes ------------------------------------------------------------------*/
#include "91x_scu.h"

/* Include of other module interface headers ---------------------------------*/
/* Local includes ------------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define SCU_PLLEN 0x80000
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Interface functions -------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

/*******************************************************************************
* Function Name  : SCU_MCLKSourceConfig
* Description    : Configures the MCLK source clock
* Input          : MCLK_Source = SCU_MCLK_OSC, SCU_MCLK_PLL or SCU_MCLK_RTC
* Output         : None
* Return         : ErrorStatus: SUCCESS or ERROR
* Note           : this function returns ERROR if trying to select the PLL as
*                  clock source while the PLL is disabled or not locked.
*******************************************************************************/
ErrorStatus SCU_MCLKSourceConfig(u32 MCLK_Source)
{
  u32 CLKCNTR_Value;

  CLKCNTR_Value = SCU->CLKCNTR;         /*get CLKCNTR register value*/
  CLKCNTR_Value &=~0x3;                 /*clear field MCLKSEL*/
  if (MCLK_Source == SCU_MCLK_PLL)      /*PLL selected as clock source*/
  {
    /*check if PLL enabled & locked*/
    if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
    return ERROR;
  }
  else CLKCNTR_Value |=MCLK_Source;     /*OSC or RTC selected as clock source*/
  SCU->CLKCNTR = CLKCNTR_Value;         /*Update CLKCNTR register value*/
  return SUCCESS;
}

/*******************************************************************************
* Function Name  : SCU_PLLFactorsConfig
* Description    : Sets the PLL factors
* Input          : PLLN, PLLM and PLLP
* Output         : None
* Return         : ErrorStatus: ERROR or SUCCESS
* Notes          : -The PLL factors must respect the PLL specification requirements
*                  -The function returns ERROR if trying to change PLL
*                   factors while PLL is selected as Main Clock source (MCLK)
*                  -This function disables the PLL, to enable the PLL use
*                   function" SCU_PLLCmd(ENABLE)" after setting the PLL factors
******************************************************************************/
ErrorStatus SCU_PLLFactorsConfig(u8 PLLN, u8 PLLM, u8 PLLP)
{
  if (SCU_PLLCmd(DISABLE)==SUCCESS)      /*Disable PLL*/
  {
    SCU->PLLCONF =0;                     /*clear PLLCONF register*/
    SCU->PLLCONF |=(PLLN<<8);            /*update PLLN field*/
    SCU->PLLCONF |=PLLM;                 /*update PLLM field*/
    SCU->PLLCONF |=PLLP<<16;             /*update PLLP field*/
    return SUCCESS;
  }
  return ERROR;
}

/*******************************************************************************
* Function Name  : SCU_PLLCmd
* Description    : Enable or Disable the PLL
* Input          : NewState = ENABLE or DISABLE
* Output         : None
* Return         : ErrorStatus: SUCCESS or ERROR
* Note           : -The function returns ERROR if:
*                   *trying to disable the PLL while it is selected as the MCLK
*                   *trying to enable the PLL while it is already enabled and
*                    locked
*******************************************************************************/
ErrorStatus SCU_PLLCmd(FunctionalState NewState)
{
  vu32 i;
  if (NewState==ENABLE)
  {
    if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
    {
      SCU->SYSSTATUS|=SCU_FLAG_LOCK;               /*clear LOCK bit*/
      SCU->PLLCONF |=SCU_PLLEN;                    /*PLL Enable*/
      while(!SCU->SYSSTATUS&SCU_FLAG_LOCK);        /*Wait PLL to lock*/
      return SUCCESS;
    }
    else return ERROR;
  }
  else /*NewState = DISABLE*/
  {
    if(SCU->CLKCNTR&0x3)                /*check if PLL not sys CLK*/
    {
      for(i=10;i>0;i--);                /*delay before PLL disabling*/
      SCU->PLLCONF &=~SCU_PLLEN;        /*PLL Disable*/
      return SUCCESS;
    }
    else return ERROR;
  }
}

/*******************************************************************************
* Function Name  : SCU_RCLKDivisorConfig
* Description    : Sets the RCLK divisor value
* Input          : RCLK_Divisor
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_RCLKDivisorConfig(u32 RCLK_Divisor)
{
  SCU->CLKCNTR &=SCU_RCLK_Div1;              /*clear RCLKDIV[2:0] field*/
  if (RCLK_Divisor!=SCU_RCLK_Div1)
  SCU->CLKCNTR |= RCLK_Divisor;              /*update field with RCLK divisor*/
}

/*******************************************************************************
* Function Name  : SCU_HCLKDivisorConfig
* Description    : Sets the HCLK divisor value
* Input          : HCLK_Divisor
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_HCLKDivisorConfig(u32 HCLK_Divisor)
{
  SCU->CLKCNTR &=SCU_HCLK_Div1;              /*clear AHBDIV[1:0] field*/
  if (HCLK_Divisor!=SCU_HCLK_Div1)
  SCU->CLKCNTR |= HCLK_Divisor;              /*update field with HCLK divisor*/
}

/*******************************************************************************
* Function Name  : SCU_PCLKDivisorConfig
* Description    : Sets the PCLK divisor value
* Input          : PCLK_Divisor
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_PCLKDivisorConfig(u32 PCLK_Divisor)
{
  SCU->CLKCNTR &=SCU_PCLK_Div1;              /*clear APBDIV[1:0] field*/
  if (PCLK_Divisor!=SCU_PCLK_Div1)
  SCU->CLKCNTR |= PCLK_Divisor;              /*update field with PCLK Divisor*/
}

/*******************************************************************************
* Function Name  : SCU_APBPeriphClockConfig
* Description    : Enable the clock for an APB peripheral
* Input          : -APBPerip : APB peripherals(__RTC, __ADC ,...)
*                  -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_APBPeriphClockConfig(u32 APBPeriph, FunctionalState NewState)
{
  if (NewState==ENABLE)                     /*Enable clock for APB peripheral*/
  SCU->PCGR1 |=APBPeriph;
  else
  SCU->PCGR1 &=~APBPeriph;                  /*Disable clock for APB peripheral*/
}

/*******************************************************************************
* Function Name  : SCU_AHBPeriphClockConfig
* Description    : Enable the clock for an AHB peripheral
* Input          : -AHBPerip: AHB peripherals(__USB, __DMA,...)
*                  -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState)
{
  if (NewState==ENABLE)                     /*Enable clock for AHB peripheral*/
  SCU->PCGRO |=AHBPeriph;
  else
  SCU->PCGRO &=~AHBPeriph;                  /*Disable clock for AHB peripheral*/
}

/*******************************************************************************
* Function Name  : SCU_APBPeriphReset
* Description    : Assert or deassert Reset on APB peripheral
* Input          : -APBPeriph: APB peripherals(__RTC, __ADC,...)
                   -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_APBPeriphReset(u32 APBPeriph, FunctionalState NewState)
{
  if (NewState==DISABLE)                    /*APB peripheral not held in Reset*/
  SCU->PRR1 |=APBPeriph;
  else
  SCU->PRR1 &=~APBPeriph;                   /*APB peripheral held in Reset*/
}

/*******************************************************************************
* Function Name  : SCU_AHBPeriphReset
* Description    : Assert or deassert Reset on AHB peripheral
* Input          : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
                   -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_AHBPeriphReset(u32 AHBPeriph, FunctionalState NewState)
{
  if (NewState==DISABLE)
  SCU->PRR0 |=AHBPeriph;                    /*AHB peripheral not held in Reset*/
  else
  SCU->PRR0 &=~AHBPeriph;                   /*AHB peripheral held in Reset*/
}

/*******************************************************************************
* Function Name  : SCU_APBPeriphIdleConfig
* Description    : Enable or Disable Periph Clock during Idle mode
* Input          : -APBPeriph: APB peripherals(__RTC, __ADC,...)
                   -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_APBPeriphIdleConfig(u32 APBPeriph, FunctionalState NewState)
{
  if (NewState==ENABLE)
  SCU->MGR1 |=APBPeriph;      /*APB peripheral clock enabled during Idle mode*/
  else
  SCU->MGR1 &=~APBPeriph;     /*APB peripheral clock disabled during Idle mode*/
}

/*******************************************************************************
* Function Name  : SCU_AHBPeriphIdleConfig
* Description    : Enable or Disable Periph Clock during Idle mode
* Input          : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
                   -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_AHBPeriphIdleConfig(u32 AHBPeriph, FunctionalState NewState)
{
  if (NewState==ENABLE)
  SCU->MGR0 |=AHBPeriph;      /*AHB peripheral clock enabled during Idle mode*/
  else
  SCU->MGR0 &=~AHBPeriph;     /*AHB peripheral clock disabled during Idle mode*/
}

/*******************************************************************************
* Function Name  : SCU_APBPeriphDebugConfig
* Description    : Enable or Disable Periph Clock during ARM debug state
* Input          : -APBPeriph: APB peripherals(__RTC, __ADC,...)
                   -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_APBPeriphDebugConfig(u32 APBPeriph, FunctionalState NewState)
{
  if (NewState==ENABLE)
  SCU->PECGR1 |=APBPeriph;    /*APB peripheral clock enabled during ARM debug state*/
  else
  SCU->PECGR1 &=~APBPeriph;   /*APB peripheral clock disabled during ARM debug state*/
}

/*******************************************************************************
* Function Name  : SCU_AHBPeriphDebugConfig
* Description    : Enable or Disable Periph Clock during ARM debug state
* Input          : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
                   -NewState : ENABLE or DISABLE
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_AHBPeriphDebugConfig(u32 AHBPeriph, FunctionalState NewState)
{
  if (NewState==ENABLE)
  SCU->PECGR0 |=AHBPeriph;    /*AHB peripheral clock enabled during ARM debug state*/
  else
  SCU->PECGR0 &=~AHBPeriph;   /*AHB peripheral clock disabled during ARM debug state*/
}
/*******************************************************************************
* Function Name  : SCU_BRCLKDivisorConfig
* Description    : Sets the BRCLK divisor value
* Input          : BRCLK_Divisor
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_BRCLKDivisorConfig(u32 BRCLK_Divisor)
{
  SCU->CLKCNTR &=SCU_BRCLK_Div2;              /*Clear BRSEL bit*/
  if (BRCLK_Divisor==SCU_BRCLK_Div1)
  SCU->CLKCNTR |= SCU_BRCLK_Div1;             /*set bit BRSEL*/
}

/*******************************************************************************
* Function Name  : SCU_TIMExtCLKCmd
* Description    : Enable or disable the TIMx external clock source
* Input          : - TIMx : SCU_TIM01 or SCU_TIM23
*                  -  NewState : ENABLE or DISABLE
* Output         : Non
* Return         : None
*******************************************************************************/
void SCU_TIMExtCLKCmd (u8 TIMx, FunctionalState NewState)
{
  if (TIMx== SCU_TIM01)                     /*TIM01 clock source configuration*/
  {
    SCU->CLKCNTR &=0xFFFFDFFF;
    if (NewState==ENABLE)
    SCU->CLKCNTR |=0x2000;
  }
  else
  {
    SCU->CLKCNTR &=0xFFFFBFFF;            /*TIM23 clock source configuration*/
     if (NewState==ENABLE)
    SCU->CLKCNTR |=0x4000;
  }
}

/*******************************************************************************
* Function Name  : SCU_USBCLKConfig
* Description    : Configures the clock source for the 48MHz USBCLK
* Input          : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT
* Output         : None
* Return         : None
*******************************************************************************/
void SCU_USBCLKConfig(u32 USBCLK_Source)
{
  SCU->CLKCNTR &=SCU_USBCLK_MCLK;            /*clear USBSEL[1:0] field*/
  if (USBCLK_Source!=SCU_USBCLK_MCLK)
  SCU->CLKCNTR |= USBCLK_Source;             /*update field with USBCLK_Source*/
}

/*******************************************************************************