nor.c

davinci的NANDFLASH烧写程序

{
    // Intel Exit back to read array mode
    Intel_Soft_Reset_Flash(pNorInfo);
    
    // Write ID command
    flash_write_cmd(pNorInfo,pNorInfo->flashBase, 0, INTEL_ID_CMD);
        
    //Read Manufacturer's ID
    pNorInfo->manfID = (MANFID) flash_read_data(pNorInfo, pNorInfo->flashBase, INTEL_MANFID_ADDR);
    
    // Read Device ID
    pNorInfo->devID1 = (Uint16) (MANFID) flash_read_data(pNorInfo, pNorInfo->flashBase, INTEL_DEVID_ADDR);
    pNorInfo->devID2 = 0x0000;
        
    // Intel Exit back to read array mode
    Intel_Soft_Reset_Flash(pNorInfo); 
    
    return E_PASS;
}

// Reset back to Read array mode
void Intel_Soft_Reset_Flash(PNOR_INFO pNorInfo)
{
    // Intel Exit back to read array mode
    flash_write_cmd(pNorInfo, pNorInfo->flashBase, 0, INTEL_RESET);
}

// Clear status register
void Intel_Clear_Status(PNOR_INFO pNorInfo)
{
    // Intel clear status
    flash_write_cmd(pNorInfo, pNorInfo->flashBase,0,INTEL_CLEARSTATUS_CMD);
}

// Remove block write protection
Uint32 Intel_Clear_Lock(PNOR_INFO pNorInfo, VUint32 blkAddr)
{

	// Write the Clear Lock Command
    flash_write_cmd(pNorInfo, blkAddr,0,INTEL_LOCK_CMD0);

    flash_write_cmd(pNorInfo, blkAddr,0,INTEL_UNLOCK_BLOCK_CMD);

    // Check Status
	return Intel_Lock_Status_Check(pNorInfo);
}

// Write-protect a block
Uint32 Intel_Set_Lock(PNOR_INFO pNorInfo, VUint32 blkAddr)
{
	// Write the Set Lock Command	
    flash_write_cmd(pNorInfo, blkAddr,0,INTEL_LOCK_CMD0);            
	
    flash_write_cmd(pNorInfo, blkAddr,0,INTEL_LOCK_BLOCK_CMD);

	// Check Status
	return Intel_Lock_Status_Check(pNorInfo);
}

void Intel_Wait_For_Status_Complete(PNOR_INFO pNorInfo)
{
    while ( !flash_issetall(pNorInfo, pNorInfo->flashBase, 0, BIT7) );
}

Uint32 Intel_Lock_Status_Check(PNOR_INFO pNorInfo)
{
    Uint32 retval = E_PASS;
    //Uint8 status;

    Intel_Wait_For_Status_Complete(pNorInfo);

    //status = flash_read_uint16((Uint32)pNorInfo->flashBase,0);
    //if ( status & BIT5 )
    if (flash_issetsome(pNorInfo, pNorInfo->flashBase, 0, (BIT5 | BIT3)))
    {
        retval = E_FAIL;
		/*if ( status & BIT4 )
        {
			printf("Command Sequence Error\r\n", FALSE);
		}
		else
		{
			printf("Clear Lock Error\r\n", FALSE);
		}*/
	}
	/*if ( status & BIT3 )
	{
		retval = E_FAIL;
		//printf("Voltage Range Error\n", FALSE);
    }*/
	
	// Clear status
	Intel_Clear_Status(pNorInfo);
	
	// Put chip back into read array mode.
	Intel_Soft_Reset_Flash(pNorInfo);
	
	// Set Timings back to Optimum for Read
	return retval;
}

// Erase Block
Uint32 Intel_Erase(PNOR_INFO pNorInfo, VUint32 blkAddr)
{
	Uint32 retval = E_PASS;
	
	// Clear Lock Bits
	retval |= Intel_Clear_Lock(pNorInfo,blkAddr);
	
	// Send Erase commands
	flash_write_cmd(pNorInfo,blkAddr,0,INTEL_ERASE_CMD0);
	flash_write_cmd(pNorInfo,blkAddr,0,INTEL_ERASE_CMD1);
	
	// Wait until Erase operation complete
	Intel_Wait_For_Status_Complete(pNorInfo);
    
    // Verify successful erase                       
    if ( flash_issetsome(pNorInfo,pNorInfo->flashBase, 0, BIT5) )
        retval = E_FAIL;
    
	// Put back into Read Array mode.
	Intel_Soft_Reset_Flash(pNorInfo);
	
	return retval;
}

// Write data
Uint32 Intel_Write(PNOR_INFO pNorInfo, Uint32 address, VUint32 data )
{
    Uint32 retval = E_PASS;
	
	// Send Write command
	flash_write_cmd(pNorInfo,address,0,INTEL_WRITE_CMD);
	flash_write_data(pNorInfo,address, data);
                  
    // Wait until Write operation complete
    Intel_Wait_For_Status_Complete(pNorInfo);
	                          
    // Verify successful program
    if ( flash_issetsome(pNorInfo, pNorInfo->flashBase, 0, (BIT4|BIT3)) )
    {
        //printf("Write Op Failed.\r\n", FALSE);
        retval = E_FAIL;
    }
    
    // Lock the block
    //retval |= Intel_Set_Lock(blkAddr);
    
    // Put back into Read Array mode.
	Intel_Soft_Reset_Flash(pNorInfo);
                          
    return retval;
}

// Buffer write data
Uint32 Intel_BufferWrite(PNOR_INFO pNorInfo, Uint32 address, VUint8 data[], Uint32 numBytes )
{
    Uint32 startAddress = address;
	Uint32 retval = E_PASS;
	Uint32 timeoutCnt = 0, shift;

	// Send Write_Buff_Load command   
    do {
        flash_write_cmd(pNorInfo,address,0,INTEL_WRT_BUF_LOAD_CMD);
        timeoutCnt++;
    }while( (!flash_issetall(pNorInfo,pNorInfo->flashBase, 0, BIT7)) && (timeoutCnt < 0x00010000) );
    
    if (timeoutCnt >= 0x10000)
    {
        //    printf("Write Op Failed.\r\n", FALSE);
        retval = E_TIMEOUT;
    }
    else
    {
        //Establish correct shift value
	    shift = 0;
	    while ((pNorInfo->busWidth >> shift) > 1)
    	    shift++;
    
        // Write Length (either numBytes or numBytes/2)	    
        flash_write_cmd(pNorInfo, startAddress, 0, (numBytes >> shift) - 1);
        
        // Write buffer length
        //flash_write_data(startAddress, (length - 1));
        
        // Write buffer data
        flash_write_databuffer(pNorInfo, &address,(void*)data,numBytes);
                
        // Send write buffer confirm command
        flash_write_cmd(pNorInfo, startAddress,0,INTEL_WRT_BUF_CONF_CMD);
        
        // Check status
        Intel_Wait_For_Status_Complete(pNorInfo);
        // Verify program was successful
        
        //if ( flash_read_uint8(pNorInfo->flashBase,0) & BIT4 )
        if ( flash_issetsome(pNorInfo, pNorInfo->flashBase, 0, BIT4) )
        {
        //    printf("Write Buffer Op Failed.\r\n", FALSE);
            retval = E_FAIL;
        }
        
        // Put back into Read Array mode.
    	Intel_Soft_Reset_Flash(pNorInfo);
    }
                          
    return retval;
}
// ---------------------------------------------------------------------------
// -------------------- End of Intel specific commands -----------------------
// ---------------------------------------------------------------------------

// ---------------------------------------------------------------------------
// -------------------- Begin of AMD specific commands -----------------------
// ---------------------------------------------------------------------------

// Identify the Manufacturer and Device ID 
Uint32 AMD_ID( PNOR_INFO pNorInfo )
{
    // Exit back to read array mode
    AMD_Soft_Reset_Flash(pNorInfo);

    // Write ID commands
    AMD_Prefix_Commands(pNorInfo);
    flash_write_cmd(pNorInfo, pNorInfo->flashBase, AMD_CMD2_ADDR, AMD_ID_CMD);

    // Read manufacturer's ID
    pNorInfo->manfID = (MANFID) flash_read_data(pNorInfo,pNorInfo->flashBase, AMD_MANFID_ADDR);
    
    // Read device ID
    pNorInfo->devID1 = (Uint16) flash_read_data(pNorInfo,pNorInfo->flashBase, AMD_DEVID_ADDR0);
    
    // Read additional ID bytes if needed
    if ( (pNorInfo->devID1 & 0xFF ) == AMD_ID_MULTI )
        pNorInfo->devID2 = flash_read_CFI_bytes(pNorInfo, AMD_DEVID_ADDR1, 2).w;
    else
        pNorInfo->devID2 = 0x0000;
        
    // Exit back to read array mode
    AMD_Soft_Reset_Flash(pNorInfo);
    
    return E_PASS;
}

void AMD_Soft_Reset_Flash(PNOR_INFO pNorInfo)
{
	// Reset Flash to be in Read Array Mode
	flash_write_cmd(pNorInfo,pNorInfo->flashBase,AMD_CMD2_ADDR,AMD_RESET);                  
}

// AMD Prefix Commands
void AMD_Prefix_Commands(PNOR_INFO pNorInfo)
{
    flash_write_cmd(pNorInfo, pNorInfo->flashBase, AMD_CMD0_ADDR, AMD_CMD0);
    flash_write_cmd(pNorInfo, pNorInfo->flashBase, AMD_CMD1_ADDR, AMD_CMD1);
}

// Erase Block
Uint32 AMD_Erase(PNOR_INFO pNorInfo, Uint32 blkAddr)
{
    Uint32 retval = E_PASS;

    // Send commands
	AMD_Prefix_Commands(pNorInfo);
    flash_write_cmd(pNorInfo,pNorInfo->flashBase, AMD_CMD2_ADDR, AMD_BLK_ERASE_SETUP_CMD);
    AMD_Prefix_Commands(pNorInfo);
    flash_write_cmd(pNorInfo,blkAddr, AMD_CMD2_ADDR, AMD_BLK_ERASE_CMD);
	
	// Poll DQ7 and DQ15 for status
    while ( !flash_issetall(pNorInfo,blkAddr, 0, BIT7) );
    
    // Check data 
    if ( !flash_data_isequal(pNorInfo,blkAddr, 0, AMD_BLK_ERASE_DONE) )
        retval = E_FAIL;
	
	/* Flash Mode: Read Array */
    AMD_Soft_Reset_Flash(pNorInfo);
    
    return retval;
}

// AMD Flash Write
Uint32 AMD_Write(PNOR_INFO pNorInfo, Uint32 address, VUint32 data )
{
	Uint32 retval = E_PASS;
	
	// Send Commands
	AMD_Prefix_Commands(pNorInfo);
    flash_write_cmd(pNorInfo,pNorInfo->flashBase, AMD_CMD2_ADDR, AMD_PROG_CMD);
    flash_write_data(pNorInfo,address, data);

	// Wait for ready.
	while(TRUE)
	{
	    if ( (flash_read_data(pNorInfo, address, 0 ) & (BIT7 | BIT15) ) == (data & (BIT7 | BIT15) ) )
	    {
			break;
	    }
		else
		{
		    if(flash_issetall(pNorInfo, address, 0, BIT5))
			{
				if ( (flash_read_data(pNorInfo, address, 0 ) & (BIT7 | BIT15) ) != (data & (BIT7 | BIT15) ) )
				{
				    printf("Timeout ocurred.\r\n",FALSE);
					retval = E_FAIL;
				}
			    break;				
			}
		}
	}
	
    // Return Read Mode
	AMD_Soft_Reset_Flash(pNorInfo);
	
	// Verify the data.
	if ( (retval == E_PASS) && ( flash_read_data(pNorInfo, address, 0) != data) )
	    retval = E_FAIL;
	
	return retval;
}

// AMD flash buffered write
Uint32 AMD_BufferWrite(PNOR_INFO pNorInfo, Uint32 address, VUint8 data[], Uint32 numBytes )
{
    Uint32 startAddress = address;
	Uint32 blkAddress, blkSize;
	Uint32 data_temp;
	Uint32 retval = E_PASS;
	Uint32 shift;
	
	// Get block base address and size
	NOR_GetBlockInfo(pNorInfo, address, &blkSize, &blkAddress);
			
	// Write the Write Buffer Load command
    AMD_Prefix_Commands(pNorInfo);
    flash_write_cmd(pNorInfo, blkAddress, 0, AMD_WRT_BUF_LOAD_CMD);
        
    //Establish correct shift value
	shift = 0;
	while ((pNorInfo->busWidth >> shift) > 1)
	    shift++;
    
    // Write Length (either numBytes or numBytes/2)	    
    flash_write_cmd(pNorInfo, blkAddress, 0, (numBytes >> shift) - 1);