📄 norwriter.h
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/* --------------------------------------------------------------------------
FILE : ubl.h
PURPOSE : UBL main header file
PROJECT : DaVinci CCS NAND Flashing Utility
AUTHOR : Daniel Allred
DATE : 04-Jun-2007
HISTORY
v1.00 - DJA - 04-Jun-2007
Completion (with support for DM6441 and DM6441_LV)
----------------------------------------------------------------------------- */
#ifndef _NORWRITER_H_
#define _NORWRITER_H_
#include "tistdtypes.h"
//UBL version number
#define UBL_VERSION_STRING "1.00"
#ifdef UBL_NAND
#define UBL_FLASH_TYPE "NAND"
#else
#define UBL_FLASH_TYPE "NOR"
#endif
// Define MagicNumber constants
#define MAGIC_NUMBER_VALID (0xA1ACED00)
/* Used by UBL when doing UART boot */
#define UBL_UART_BOOT (0xA1ACED00) /* Safe boot mode */
#define UBL_NOR_BURN (0xA1ACED11) /* Download via UART & Burn NOR with UBL readable header and BIN data*/
#define UBL_NOR_ERASE (0xA1ACED22) /* Download via UART & Global erase the NOR Flash*/
#define UBL_NAND_BURN (0xA1ACED33) /* Download via UART & Burn NAND - Image is binary */
#define UBL_NAND_ERASE (0xA1ACED44) /* Download via UART & Global erase the NAND Flash*/
/* Used by RBL when doing NAND boot */
#define UBL_MAGIC_DMA (0xA1ACED11) /* DMA boot mode */
#define UBL_MAGIC_IC (0xA1ACED22) /* I Cache boot mode */
#define UBL_MAGIC_FAST (0xA1ACED33) /* Fast EMIF boot mode */
#define UBL_MAGIC_DMA_IC (0xA1ACED44) /* DMA + ICache boot mode */
#define UBL_MAGIC_DMA_IC_FAST (0xA1ACED55) /* DMA + ICache + Fast EMIF boot mode */
/* Used by UBL when doing UART boot, UBL Nor Boot, or NAND boot */
#define UBL_MAGIC_BIN_IMG (0xA1ACED66) /* Execute in place supported*/
/* Used by UBL when doing UART boot */
#define UBL_MAGIC_NOR_RESTORE (0xA1ACED77) /* Download via UART & Restore NOR with binary data */
#define UBL_MAGIC_NOR_SREC_BURN (0xA1ACED88) /* Download via UART & Burn NOR with UBL readable header and SREC data*/
#define UBL_MAGIC_NOR_BIN_BURN (0xA1ACED99) /* Download via UART & Burn NOR with UBL readable header and BIN data*/
#define UBL_MAGIC_NOR_GLOBAL_ERASE (0xA1ACEDAA) /* Download via UART & Global erase the NOR Flash*/
#define UBL_MAGIC_NAND_SREC_BURN (0xA1ACEDBB) /* Download via UART & Burn NAND - Image is S-record*/
#define UBL_MAGIC_NAND_BIN_BURN (0xA1ACEDCC) /* Download via UART & Burn NAND - Image is binary */
#define UBL_MAGIC_NAND_GLOBAL_ERASE (0xA1ACEDDD) /* Download via UART & Global erase the NAND Flash*/
// Define UBL image size
#define UBL_IMAGE_SIZE (0x00003800)
// Define maximum downloadable image size
#define MAX_IMAGE_SIZE (0x02000000u)
#define RAM_START_ADDR (0x80000000u)
#define RAM_END_ADDR ((RAM_START_ADDR + DDR_RAM_SIZE))
typedef struct {
Uint32 magicNum; /* Expected magic number */
Uint32 entryPoint; /* Entry point of the user application */
Uint32 numPage; /* Number of pages where boot loader is stored */
Uint32 block; /* starting block number where User boot loader is stored */
Uint32 page; /* starting page number where boot-loader is stored */
Uint32 ldAddress; /* Starting RAM address where image is to copied - XIP Mode */
} NAND_BOOT;
typedef struct {
Uint32 magicNum;
Uint32 entryPoint;
Uint32 appSize;
Uint32 ldAddress; /* Starting RAM address where image is to copied - XIP Mode */
} NOR_BOOT;
typedef enum BootMode_ {
NO_BOOT = 0x0, // Emulation boot
HPI_x27 = 0x1, // Requires Fastboot (x27 PLL)
HPI = 0x2, // Fastboot => x20 PLL, no Fastboot => PLL bypass
HPI_x15 = 0x3, // Requires Fastboot (x15 PLL)
EMIFA = 0x4, // Fastboot => AIS (x20 PLL), No Fastboot => XiP (PLL bypass)
I2C = 0x5, // Fastboot => x20 PLL, no Fastboot => PLL bypass
SPI = 0x6, // Fastboot => x20 PLL, no Fastboot => PLL bypass
NAND = 0x7, // Fastboot => x20 PLL, no Fastboot => PLL bypass
UART_NO_FC = 0x8, // Fastboot => x20 PLL, no Fastboot => PLL bypass
EMIFA_NOAIS = 0x9, // Requires Fastboot (x20 PLL), no AIS parsing
UART_FC = 0xE // Fastboot => x20 PLL, no Fastboot => PLL bypass
} BootMode;
// ---------------- Function prototypes ----------------
void main(void);
Uint32 norwriter(void);
#endif //_NORWRITER_H_
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