ethernet_c8051f120.c

c8051f120开发的使用CS8900A以太网控制芯片发送和接收数据包

//-----------------------------------------------------------------------------
// Ethernet_Routines.c
//-----------------------------------------------------------------------------
//
// AUTH: FB
// DATE: 7 OCT 02
//
// Target: C8051F12x
// Tool chain: KEIL C51
//
// Description: This is an example of how to send and receive packets using the
//              CS8900A Ethernet Controller in 8-bit polled mode.  
//
//              This program periodically sends Ethernet Packets and captures
//              all incoming packets. The incoming packets are displayed on 
//              a UART terminal at a baud rate of 115200.
//              
//              
//              To connect the device directly to a PC, a crossover Ethernet 
//              cable is needed. If using a hub or a switch, then a normal 
//              Ethernet cable may be used.  
//
    
//-----------------------------------------------------------------------------
// Includes
//-----------------------------------------------------------------------------
#include <c8051f120.h>                 // SFR declarations
#include <stdio.h>                     // printf()

//-----------------------------------------------------------------------------
// 16-bit SFR Definitions for 'F12x
//-----------------------------------------------------------------------------

sfr16 DP       = 0x82;                 // data pointer
sfr16 ADC0     = 0xbe;                 // ADC0 data
sfr16 ADC0GT   = 0xc4;                 // ADC0 greater than window
sfr16 ADC0LT   = 0xc6;                 // ADC0 less than window
sfr16 RCAP2    = 0xca;                 // Timer2 capture/reload
sfr16 RCAP3    = 0xca;                 // Timer3 capture/reload
sfr16 RCAP4    = 0xca;                 // Timer4 capture/reload
sfr16 TMR2     = 0xcc;                 // Timer2
sfr16 TMR3     = 0xcc;                 // Timer3
sfr16 TMR4     = 0xcc;                 // Timer4
sfr16 DAC0     = 0xd2;                 // DAC0 data
sfr16 DAC1     = 0xd2;                 // DAC1 data
sfr16 PCA0CP5  = 0xe1;                 // PCA0 Module 5 capture
sfr16 PCA0CP2  = 0xe9;                 // PCA0 Module 2 capture
sfr16 PCA0CP3  = 0xeb;                 // PCA0 Module 3 capture
sfr16 PCA0CP4  = 0xed;                 // PCA0 Module 4 capture
sfr16 PCA0     = 0xf9;                 // PCA0 counter
sfr16 PCA0CP0  = 0xfb;                 // PCA0 Module 0 capture
sfr16 PCA0CP1  = 0xfd;                 // PCA0 Module 1 capture


//-----------------------------------------------------------------------------
// Data Stuctures and Type Definitions
//-----------------------------------------------------------------------------
typedef union MACADDR {                // The 48-bit Ethernet MAC address
   unsigned int Int[3];
   unsigned char Char[6];
} MACADDR;

typedef union ULONG {                  // Byte Addressable Unsigned Long
   unsigned long Long;
   unsigned int Int[2];
   unsigned char Char[4];
} ULONG;

typedef union UINT {                   // Byte Addressable Unsigned Int
   unsigned int Int;
   unsigned char Char[2];
} UINT;

//-----------------------------------------------------------------------------
// Global CONSTANTS and VARIABLES 
//-----------------------------------------------------------------------------
#define SYSCLK          49000000       // SYSCLK frequency in Hz
#define BAUDRATE        115200         // Baud rate of UART in bps

sbit ETH_RESET = P4^5;                 //  CS8900A reset pin

#define TRANSMIT_CMDH   0x00           // Transmit Command (High and Low
#define TRANSMIT_CMDL   0xC0           // bytes)


sbit LED = P1^6;                       // LED='1' means ON
sbit SW2 = P3^7;                       // SW2='0' means switch pressed

MACADDR MYMAC;                         // The 48-bit MAC address for 
                                       // the Ethernet Controller
MACADDR BROADCAST;                     // A broadcast destination address
                                       // for sending packets
#define BASE_ADDRESS 0xC000

// CS8900A Internal PacketPage Register Addresses
#define IPPREG_PRODUCT_ID    0x0000
#define IPPREG_BASE_ADDRESS  0x0020
#define IPPREG_LineCTL       0x0112
#define IPPREG_RxCTL         0x0104
#define IPPREG_RxCFG         0x0102
#define IPPREG_BufCFG        0x010A
#define IPPREG_BufEvent      0x012C
#define IPPREG_TxEvent       0x0128
#define IPPREG_RxEvent       0x0124
#define IPPREG_IA            0x0158
#define IPPREG_BusST         0x0138
#define IPPREG_TestCTL       0x0118
#define IPPREG_LineST        0x0134
#define IPPREG_SelfST        0x0136

// CS8900A PacketPage Register Bit Definitions
#define TxBidErr     0x0080 
#define RxOK         0x0100
#define Rdy4TxNow    0x0100
#define TxUnderrun   0x0200
#define TxOK         0x0100
#define INITD        0x0080
#define SerTxON      0x0080
#define SerRxON      0x0040
#define PromiscuousA 0x0080
#define RxOKA        0x0100
#define MulticastA   0x0200
#define IndividualA  0x0400
#define BroadcastA   0x0800
#define CRCerrorA    0x1000
#define RuntA        0x2000
#define ExtradataA   0x4000

//-----------------------------------------------------------------------------
// CS8900A Direct Access Register Definitions
//-----------------------------------------------------------------------------
volatile unsigned char xdata DATA0L              _at_ (BASE_ADDRESS + 0x0000);
volatile unsigned char xdata DATA0H              _at_ (BASE_ADDRESS + 0x0001);
volatile unsigned char xdata DATA1L              _at_ (BASE_ADDRESS + 0x0002);
volatile unsigned char xdata DATA1H              _at_ (BASE_ADDRESS + 0x0003);
volatile unsigned char xdata TxCMDL              _at_ (BASE_ADDRESS + 0x0004);
volatile unsigned char xdata TxCMDH              _at_ (BASE_ADDRESS + 0x0005);
volatile unsigned char xdata TxLENGTHL           _at_ (BASE_ADDRESS + 0x0006);
volatile unsigned char xdata TxLENGTHH           _at_ (BASE_ADDRESS + 0x0007);
volatile unsigned char xdata ISQL                _at_ (BASE_ADDRESS + 0x0008);
volatile unsigned char xdata ISQH                _at_ (BASE_ADDRESS + 0x0009);
volatile unsigned char xdata PACKETPAGE_POINTERL _at_ (BASE_ADDRESS + 0x000A);
volatile unsigned char xdata PACKETPAGE_POINTERH _at_ (BASE_ADDRESS + 0x000B);
volatile unsigned char xdata PACKETPAGE_DATA0L   _at_ (BASE_ADDRESS + 0x000C); 
volatile unsigned char xdata PACKETPAGE_DATA0H   _at_ (BASE_ADDRESS + 0x000D); 
volatile unsigned char xdata PACKETPAGE_DATA1L   _at_ (BASE_ADDRESS + 0x000E); 
volatile unsigned char xdata PACKETPAGE_DATA1H   _at_ (BASE_ADDRESS + 0x000F); 

//-----------------------------------------------------------------------------
// Function PROTOTYPES
//-----------------------------------------------------------------------------
void main (void);
void SYSCLK_Init (void);
void PORT_Init (void);
void UART1_Init (void);
void EMIF_Init (void);

void CS8900A_Reset(void);
void CS8900A_Init(void);

unsigned long PACKETPAGE_ReadID();
unsigned int PACKETPAGE_Read (unsigned int register_address);
void PACKETPAGE_Write(unsigned int register_address, unsigned int output_data);

void CS8900A_RxPoll(void);

void Receive_Frame(void);
void Send_Frame(char* buffer, int length,  MACADDR* address);

//-----------------------------------------------------------------------------
// MAIN Routine
//-----------------------------------------------------------------------------
void main (void) 
{
   
   char buffer[28] = { 
      0x00, 0x01, 0x08, 0x00, 0x06, 0x04, 0x00, 0x02, 0x01, 0x23,
      0x45, 0x67, 0x89, 0x10, 0x0A, 0x0A, 0x0A, 0xA3, 0x00, 0x80,
      0xAD, 0x81, 0x85, 0x0B, 0x0A, 0x0A, 0x0A, 0x9E
   };            
      
   unsigned long id;                      // holds the device ID
   
   char buffer2[5] = "    ";
      
   long k;                                // counter

   WDTCN = 0xde;                          // Disable watchdog timer
   WDTCN = 0xad;

   SYSCLK_Init (); 
   PORT_Init ();
   UART1_Init ();
   EMIF_Init ();

   CS8900A_Reset();                       // Reset the CS8900A
   
   CS8900A_Init();                        // Initialize for Rx and Tx
   
   // Initialize the Global MAC addresses
   MYMAC.Int[0] = 0x0123;                 // This address should be 
   MYMAC.Int[1] = 0x4567;                 // set to the MAC address
   MYMAC.Int[2] = 0x8910;                 // on the AB2 Ethernet Card
   
   BROADCAST.Int[0] = 0xffff;   
   BROADCAST.Int[1] = 0xffff;  
   BROADCAST.Int[2] = 0xffff;   
   
   
   id = PACKETPAGE_ReadID();              // Read the device ID

   while(1){   
     
     // check event registers for incoming packets
     for(k = 0; k < 50000; k++) { CS8900A_RxPoll(); }                                                             
     
     // send an IEEE 802.3 Frame          
     Send_Frame(buffer, sizeof(buffer), &BROADCAST);
  
  }

 } // end main



//-----------------------------------------------------------------------------
// Init Routines
//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------
// SYSCLK_Init
//-----------------------------------------------------------------------------
//
// This routine initializes the system clock to use the internal oscillator
// at 24.5 MHz multiplied by two using the PLL.
//
void SYSCLK_Init (void)
{
   int i;                           // software timer

   char SFRPAGE_SAVE = SFRPAGE;     // Save Current SFR page

   SFRPAGE = CONFIG_PAGE;           // set SFR page

   OSCICN = 0x83;                   // set internal oscillator to run
                                    // at its maximum frequency

   CLKSEL = 0x00;                   // Select the internal osc. as
                                    // the SYSCLK source
   
   //Turn on the PLL and increase the system clock by a factor of M/N = 2
   SFRPAGE = CONFIG_PAGE;
   
   PLL0CN  = 0x00;                  // Set internal osc. as PLL source
   SFRPAGE = LEGACY_PAGE;
   FLSCL   = 0x10;                  // Set FLASH read time for 50MHz clk
                                    // or less
   SFRPAGE = CONFIG_PAGE;
   PLL0CN |= 0x01;                  // Enable Power to PLL
   PLL0DIV = 0x01;                  // Set Pre-divide value to N (N = 1)
   PLL0FLT = 0x01;                  // Set the PLL filter register for 
                                    // a reference clock from 19 - 30 MHz
                                    // and an output clock from 45 - 80 MHz 
   PLL0MUL = 0x02;                  // Multiply SYSCLK by M (M = 2)
   
   for (i=0; i < 256; i++) ;        // Wait at least 5us
   PLL0CN  |= 0x02;                 // Enable the PLL
   while(!(PLL0CN & 0x10));         // Wait until PLL frequency is locked
   CLKSEL  = 0x02;                  // Select PLL as SYSCLK source

   SFRPAGE = SFRPAGE_SAVE;          // Restore SFR page
}

//-----------------------------------------------------------------------------
// PORT_Init
//-----------------------------------------------------------------------------
//
// Configure the Crossbar and GPIO ports
//
void PORT_Init (void)
{
   char SFRPAGE_SAVE = SFRPAGE;     // Save Current SFR page
   
   SFRPAGE = CONFIG_PAGE;           // set SFR page

   XBR0     = 0x00;                 
   XBR1     = 0x00;                 
   XBR2     = 0x44;                 // Enable crossbar, weak pull-ups,
                                    // and UART1

   P0MDOUT |= 0x01;                 // Set TX1 pin to push-pull
   P1MDOUT |= 0x40;					   // Set P1.6(LED) to push-pull
    
   // all pins used by the external memory interface are in push-pull mode 
   P4MDOUT =  0xFF; 
   P5MDOUT =  0xFF;
   P6MDOUT =  0xFF;
   P7MDOUT =  0xFF;                 
   P4 = 0xC0;                       // /WR, /RD, are high, RESET is low
   P5 = 0x00;  
   P6 = 0x00;                       // P5, P6 contain the address lines
   P7 = 0xFF;                       // P7 contains the data lines

   SFRPAGE = SFRPAGE_SAVE;          // Restore SFR page
 
}

//-----------------------------------------------------------------------------
// EMIF_Init
//-----------------------------------------------------------------------------
//
// Configure the External Memory Interface for both on and off-chip access.
//
void EMIF_Init (void){
   
   char SFRPAGE_SAVE = SFRPAGE;     // Save Current SFR page
   
   SFRPAGE = LEGACY_PAGE;
   
   EMI0CF = 0xF7;                   // Split-mode, non-multiplexed
                                    // on P4 - P7

   EMI0TC = 0xB7;					      // This constant may be modified
                                    // according to SYSCLK to meet the 
                                    // timing requirements for the CS8900A
                                    // For example, EMI0TC should be >= 0xB7 
                                    // for a 100 MHz SYSCLK.
   SFRPAGE = SFRPAGE_SAVE;          // Restore SFR page
}

//-----------------------------------------------------------------------------
// UART1_Init
//-----------------------------------------------------------------------------
//
// Configure the UART1 using Timer1, for <baudrate> and 8-N-1.
//