!readme.txt

C280x C/C++ Header Files and Peripheral Examples The DSP28xx C/C++ peripheral header files and exam

File Name                         Description
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fet430_1.c - Software Toggle P5.1
fet430_adc12_01.c - ADC12, Sample A0, Set P5.1 if A0 > 0.5*AVcc
fet430_adc12_02.c - ADC12, Single Conversion on Single Channel
fet430_adc12_03.c - ADC12, Using an External Reference
fet430_adc12_04.c - ADC12, Extend Sampling period with SHT Bits
fet430_adc12_05.c - ADC12, Using the Internal Reference
fet430_adc12_06.c - ADC12, Repeated Sequence of Conversions
fet430_adc12_07.c - ADC12, Repeated Single Channel Conversions
fet430_adc12_08.c - ADC12, Using 10 External Channels for Conversion
fet430_adc12_09.c - ADC12, Sequence of Conversions (non-repeated)
fet430_adc12_10.c - ADC12, Using the Temperature Sensor
fet430_adc12_11.c - ADC12, Single Conversion on Channel A12
fet430_adc12_12.c - ADC12, Single Conversion on Channel A13
fet430_adc12_13.c - ADC12, Single Conversion on Channel A14
fet430_adc12_14.c - ADC12, Single Conversion on Channel A15
fet430_bt_01.c - Basic Timer, Toggle P5.1 Inside ISR, DCO SMCLK
fet430_bt_02.c - Basic Timer, Toggle P5.1 Inside ISR, 32kHz ACLK
fet430_clks_02.c - FLL+, Output 32kHz XTAL + HF XTAL + Internal DCO
fet430_dac12_01.c - DAC12_0, Output 1V on DAC0
fet430_dac12_02.c - DAC12_1, Output 2V on DAC1
fet430_dac12_03.c - DAC12_0, Output Voltage Ramp on DAC0
fet430_dac12_04.c - DAC12_0, Output Voltage Ramp on VeREF+
fet430_dma_01.c - DMA0, Repeated Burst to-from RAM, Software Trigger
fet430_dma_02.c - DMA0, Repeated Block To P5OUT, TACCR2, DCO
fet430_dma_03.c - DMA0, Repeat Single to UART 19200, TACCR2, DCO
fet430_dma_04.c - DMA0, Repeated Block to DAC0 Sine Output, TACCR1, DCO
fet430_dma_05.c - DMA0, Rpt'd Blk to DAC1 8-bit Sine Output, TBCCR2, DCO
fet430_dma_06.c - DMA0, ADC12 A10 Block Xfer to RAM, Timer_B, SMCLK
fet430_dma_07.c - DMA0, ADC12 A10 Block Xfer to Flash, Timer_B, SMCLK
fet430_fll_01.c - FLL+, Runs Internal DCO at 2.45MHz
fet430_fll_02.c - FLL+, Runs Internal DCO at 8MHz
fet430_lcd_01.c - LCD, Display "0123456" on SBLCDA4 LCD
fet430_lcd_02.c - LCD, Display "430" on Varitronix VI-322 LCD
fet430_lpm3.c - FLL+, LPM3 Using Basic Timer ISR, 32kHz ACLK
fet430_oa_01.c - OA0, Comparator Mode
fet430_oa_02.c - OA0, Comparator in General-Purpose Mode
fet430_oa_03.c - OA0, General-Purpose Mode
fet430_oa_04.c - OA0, Inverting PGA Mode
fet430_oa_05.c - OA0, Non-Inverting PGA Mode
fet430_oa_06.c - OA0, Unity-Gain Buffer Mode
fet430_oa_07.c - OA1, Comparator Mode
fet430_oa_08.c - OA1, Comparator in General-Purpose Mode
fet430_oa_09.c - OA1, Inverting PGA Mode
fet430_oa_10.c - OA1, Non-Inverting PGA Mode
fet430_oa_11.c - OA1, Unity-Gain Buffer Mode
fet430_spi0_016x.c - USART0, SPI Interface to HC165/164 Shift Registers
fet430_ta_01.c - Timer_A, Toggle P5.1, CCR0 Cont. Mode ISR, DCO SMCLK
fet430_ta_02.c - Timer_A, Toggle P5.1, CCR0 Up Mode ISR, DCO SMCLK
fet430_ta_03.c - Timer_A, Toggle P5.1, Overflow ISR, DCO SMCLK
fet430_ta_04.c - Timer_A, Toggle P5.1, Overflow ISR, 32kHz ACLK
fet430_ta_05.c - Timer_A, Toggle P5.1, CCR0 Up Mode ISR, 32kHz ACLK
fet430_ta_16.c - Timer_A, PWM TA1-2 Up Mode, DCO SMCLK
fet430_ta_17.c - Timer_A, PWM TA1-2 Up Mode, 32kHz ACLK
fet430_tb_01.c - Timer_B, Toggle P5.1, CCR0 Cont. Mode ISR, DCO SMCLK
fet430_tb_02.c - Timer_B, Toggle P5.1, CCR0 Up Mode ISR, DCO SMCLK
fet430_tb_03.c - Timer_B, Toggle P5.1, Overflow ISR, DCO SMCLK
fet430_tb_04.c - Timer_B, Toggle P5.1, Overflow ISR, 32kHz ACLK
fet430_tb_05.c - Timer_B, Toggle P5.1, CCR0 Up Mode ISR, 32kHz ACLK
fet430_tb_10.c - Timer_B, PWM TB1-2 Up Mode, DCO SMCLK
fet430_tb_11.c - Timer_B, PWM TB1-2 Up Mode, 32kHz ACLK
fet430_uart01_0115k.c - USART0, 115200 UART Echo ISR, DCO SMCLK
fet430_uart01_02400.c - USART0, 2400 UART Ultra-low Pwr Echo ISR, 32kHz ACLK
fet430_uart01_09600.c - USART0, 9600 UART Echo ISR, DCO SMCLK
fet430_uart01_19200.c - USART0, 19200 UART Echo ISR, DCO SMCLK
fet430_uart02_19200.c - USART0, 19200 UART Ultra-low Pwr Echo ISR, 32kHz ACLK
fet430_wdt_01.c - WDT, Toggle P5.1, Interval Overflow ISR, DCO SMCLK
fet430_wdt_02.c - WDT, Toggle P5.1, Interval Overflow ISR, 32kHz ACLK