tmer_rd_output_compare_mode.c

this is sorce file for renesas microcontroller in which using timer RD in output compare mode.

/************************************************************************************
*                                                                                   *
*   File Name   : main.c                                                            *
*   Contents    : Main program of the Timer RD Output Compare Function              *
*                 sample program R8C/25 Group                                       *
*   Copyright(C)2006, Renesas Technology Corp.                                      *
*   Copyright(C)2006, Renesas Solutions Corp.                                       *
*   All rights reserved.                                                            *
*   Version     : 1.00                                                              *
*   note        : 1.00  : First version                                             *
************************************************************************************/
#include "sfr_r825.h"						/* Definition of the R8C/25 SFR */

/* Declaration of function prototype */
void timer_rd_init(void);					/* Initial setting of Timer RD SFR */

/************************************************************************************
Name:        main
Parameters:  None
Returns:     None
Description: User main
************************************************************************************/
main() {

	asm("FCLR I");							/* Interrupt disabled */

	/*---------------------------------------------------
	-	Change on-chip oscillator clock to Main clock	-
	---------------------------------------------------*/
	prc0 = 1;								/* Protect off */
	fra2 = 0x03;							/* Selects Divide-by-5 mode */
	fra00 = 1;								/* High-speed on-chip oscillator on */
	cm14 = 0;								/* Low-speed on-chip oscillator on */
	fra01 = 1;								/* Selects High-speed on-chip oscillator */
	cm16 = 0;								/* Main clock = No division mode */
	cm17 = 0;
	cm06 = 0;								/* CM16 and CM17 enable */
	prc0 = 0;								/* Protect on */

	/*-----------------------------------
	-   Initialize SFR of Timer RD      -
	-----------------------------------*/
	timer_rd_init();						/* Initial setting of Timer RD SFR */

	/*-----------------------------------
	-   Loop of main                    -
	-----------------------------------*/
	while(1){
		if ( imfa_trdsr0 == 1 ) {			/* IMFA flag on? */
			imfa_trdsr0 = 0;				/* IMFA flag clear */
		}
	}
}

/************************************************************************************
Name:        timer_rd_init
Parameters:  None
Returns:     None
Description: Initial setting of Timer RD SFR
************************************************************************************/
void timer_rd_init(void){

	trdstr = 0x0C;							/* Stop TRD0 Count */
	trd0ic = 0x00;							/* Interrupt disabled */
	sync_trdmr = 0;							/* TRD0 and TRD1 registers operate independently */

	trdfcr = 0x80;	 						/* CMD0-CMD1:Set to "00b" in the output compare function */
											/* STCLK:External clock input disabled */
											/* PWM3:Set this bit to "1" in the output compare function */

	toa0_trdocr = 0;						/* TRDIOA0 Initial Output Level:"L"*/
	ea0_trdoer1 = 0;						/* TRDIOA0 Pin Output enable */
	pto_trdoer2 = 0;						/* INT0 of Pulse output forced cutoff input disabled */

	tck0_trdcr0 = 0;						/* Count Source Selection Bit:fOCO40M("110") */
	tck1_trdcr0 = 1;
	tck2_trdcr0 = 1;
	cclr0_trdcr0 = 1;						/* Clear by the output compare in the TRDGRA0 register:"001" */
	cclr1_trdcr0 = 0;
	cclr2_trdcr0 = 0;

	ioa0_trdiora0 = 1;						/* Toggle output by the compare match in the TRDGRA0 register */
	ioa1_trdiora0 = 1;
	ioa2_trdiora0 = 0;						/* Set to "0" in the output compare function */
	ioa3_trdiora0 = 1;						/* Set to "1"(Reserved Bit) */

	trd0 = 0;								/* The Count value of TRD0 is initialized of 0 */
	trdgra0 = 4000 - 1;						/* 25ns * 4000 = 100us */

	trdier0 = 0x00;							/* Disable interrupts, ovie/imied/imiec/imieb/imiea */
	trdstr = 0x0D;							/* Start TRD0 Count */
}