at91rm9200.h

A sample source code to blink led for ATMEL AT91sam9260-EK board(ARM9).

/* ---------------------------------------------------------------------------- */
/*          ATMEL Microcontroller Software Support  -  ROUSSET  - */
/* ---------------------------------------------------------------------------- */
/*  The software is delivered "AS IS" without warranty or condition of any */
/*  kind, either express, implied or statutory. This includes without */
/*  limitation any warranty or condition with respect to merchantability or */
/*  fitness for any particular purpose, or against the infringements of */
/*  intellectual property rights of others. */
/* ---------------------------------------------------------------------------- */
/* File Name           : AT91RM9200.h */
/* Object              : AT91RM9200 definitions */
/* Generated           : AT91 SW Application Group  07/04/2003 (11:05:04) */
/*  */
/* CVS Reference       : /AT91RM9200.pl/1.16/Fri Feb 07 09:29:50 2003// */
/* CVS Reference       : /SYS_AT91RM9200.pl/1.2/Fri Jan 17 11:44:36 2003// */
/* CVS Reference       : /MC_1760A.pl/1.1/Fri Aug 23 13:38:22 2002// */
/* CVS Reference       : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 08:36:46 2002// */
/* CVS Reference       : /PMC_2636A.pl/1.1.1.1/Fri Jun 28 08:36:48 2002// */
/* CVS Reference       : /ST_1763B.pl/1.1/Fri Aug 23 13:41:42 2002// */
/* CVS Reference       : /RTC_1245D.pl/1.2/Fri Jan 31 11:19:06 2003// */
/* CVS Reference       : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 08:36:46 2002// */
/* CVS Reference       : /DBGU_1754A.pl/1.4/Fri Jan 31 11:18:24 2003// */
/* CVS Reference       : /UDP_1765B.pl/1.3/Fri Aug 02 13:45:38 2002// */
/* CVS Reference       : /MCI_1764A.pl/1.2/Thu Nov 14 16:48:24 2002// */
/* CVS Reference       : /US_1739C.pl/1.2/Fri Jul 12 06:49:24 2002// */
/* CVS Reference       : /SPI_AT91RMxxxx.pl/1.3/Tue Nov 26 09:20:28 2002// */
/* CVS Reference       : /SSC_1762A.pl/1.2/Fri Nov 08 12:26:38 2002// */
/* CVS Reference       : /TC_1753B.pl/1.2/Fri Jan 31 11:19:54 2003// */
/* CVS Reference       : /TWI_1761B.pl/1.4/Fri Feb 07 09:30:06 2003// */
/* CVS Reference       : /PDC_1734B.pl/1.2/Thu Nov 21 15:38:22 2002// */
/* CVS Reference       : /UHP_xxxxA.pl/1.1/Mon Jul 22 11:21:58 2002// */
/* CVS Reference       : /EMAC_1794A.pl/1.4/Fri Jan 17 11:11:54 2003// */
/* CVS Reference       : /EBI_1759B.pl/1.10/Fri Jan 17 11:44:28 2003// */
/* CVS Reference       : /SMC_1783A.pl/1.3/Thu Oct 31 13:38:16 2002// */
/* CVS Reference       : /SDRC_1758B.pl/1.2/Thu Oct 03 12:04:40 2002// */
/* CVS Reference       : /BFC_1757B.pl/1.3/Thu Oct 31 13:38:00 2002// */
/* ---------------------------------------------------------------------------- */

#ifndef AT91RM9200_H
#define AT91RM9200_H

typedef volatile unsigned int AT91_REG;/* Hardware register definition */

/* ***************************************************************************** */
/*              SOFTWARE API DEFINITION  FOR System Peripherals */
/* ***************************************************************************** */
typedef struct _AT91S_SYS {
    AT91_REG	 AIC_SMR[32]; 	/* Source Mode Register */
    AT91_REG	 AIC_SVR[32]; 	/* Source Vector Register */
    AT91_REG	 AIC_IVR; 	/* IRQ Vector Register */
    AT91_REG	 AIC_FVR; 	/* FIQ Vector Register */
    AT91_REG	 AIC_ISR; 	/* Interrupt Status Register */
    AT91_REG	 AIC_IPR; 	/* Interrupt Pending Register */
    AT91_REG	 AIC_IMR; 	/* Interrupt Mask Register */
    AT91_REG	 AIC_CISR; 	/* Core Interrupt Status Register */
    AT91_REG	 Reserved0[2]; 	/*  */
    AT91_REG	 AIC_IECR; 	/* Interrupt Enable Command Register */
    AT91_REG	 AIC_IDCR; 	/* Interrupt Disable Command Register */
    AT91_REG	 AIC_ICCR; 	/* Interrupt Clear Command Register */
    AT91_REG	 AIC_ISCR; 	/* Interrupt Set Command Register */
    AT91_REG	 AIC_EOICR; 	/* End of Interrupt Command Register */
    AT91_REG	 AIC_SPU; 	/* Spurious Vector Register */
    AT91_REG	 AIC_DCR; 	/* Debug Control Register (Protect) */
    AT91_REG	 Reserved1[1]; 	/*  */
    AT91_REG	 AIC_FFER; 	/* Fast Forcing Enable Register */
    AT91_REG	 AIC_FFDR; 	/* Fast Forcing Disable Register */
    AT91_REG	 AIC_FFSR; 	/* Fast Forcing Status Register */
    AT91_REG	 Reserved2[45]; 	/*  */
    AT91_REG	 DBGU_CR; 	/* Control Register */
    AT91_REG	 DBGU_MR; 	/* Mode Register */
    AT91_REG	 DBGU_IER; 	/* Interrupt Enable Register */
    AT91_REG	 DBGU_IDR; 	/* Interrupt Disable Register */
    AT91_REG	 DBGU_IMR; 	/* Interrupt Mask Register */
    AT91_REG	 DBGU_CSR; 	/* Channel Status Register */
    AT91_REG	 DBGU_RHR; 	/* Receiver Holding Register */
    AT91_REG	 DBGU_THR; 	/* Transmitter Holding Register */
    AT91_REG	 DBGU_BRGR; 	/* Baud Rate Generator Register */
    AT91_REG	 Reserved3[7]; 	/*  */
    AT91_REG	 DBGU_C1R; 	/* Chip ID1 Register */
    AT91_REG	 DBGU_C2R; 	/* Chip ID2 Register */
    AT91_REG	 DBGU_FNTR; 	/* Force NTRST Register */
    AT91_REG	 Reserved4[45]; 	/*  */
    AT91_REG	 DBGU_RPR; 	/* Receive Pointer Register */
    AT91_REG	 DBGU_RCR; 	/* Receive Counter Register */
    AT91_REG	 DBGU_TPR; 	/* Transmit Pointer Register */
    AT91_REG	 DBGU_TCR; 	/* Transmit Counter Register */
    AT91_REG	 DBGU_RNPR; 	/* Receive Next Pointer Register */
    AT91_REG	 DBGU_RNCR; 	/* Receive Next Counter Register */
    AT91_REG	 DBGU_TNPR; 	/* Transmit Next Pointer Register */
    AT91_REG	 DBGU_TNCR; 	/* Transmit Next Counter Register */
    AT91_REG	 DBGU_PTCR; 	/* PDC Transfer Control Register */
    AT91_REG	 DBGU_PTSR; 	/* PDC Transfer Status Register */
    AT91_REG	 Reserved5[54]; 	/*  */
    AT91_REG	 PIOA_PER; 	/* PIO Enable Register */
    AT91_REG	 PIOA_PDR; 	/* PIO Disable Register */
    AT91_REG	 PIOA_PSR; 	/* PIO Status Register */
    AT91_REG	 Reserved6[1]; 	/*  */
    AT91_REG	 PIOA_OER; 	/* Output Enable Register */
    AT91_REG	 PIOA_ODR; 	/* Output Disable Registerr */
    AT91_REG	 PIOA_OSR; 	/* Output Status Register */
    AT91_REG	 Reserved7[1]; 	/*  */
    AT91_REG	 PIOA_IFER; 	/* Input Filter Enable Register */
    AT91_REG	 PIOA_IFDR; 	/* Input Filter Disable Register */
    AT91_REG	 PIOA_IFSR; 	/* Input Filter Status Register */
    AT91_REG	 Reserved8[1]; 	/*  */
    AT91_REG	 PIOA_SODR; 	/* Set Output Data Register */
    AT91_REG	 PIOA_CODR; 	/* Clear Output Data Register */
    AT91_REG	 PIOA_ODSR; 	/* Output Data Status Register */
    AT91_REG	 PIOA_PDSR; 	/* Pin Data Status Register */
    AT91_REG	 PIOA_IER; 	/* Interrupt Enable Register */
    AT91_REG	 PIOA_IDR; 	/* Interrupt Disable Register */
    AT91_REG	 PIOA_IMR; 	/* Interrupt Mask Register */
    AT91_REG	 PIOA_ISR; 	/* Interrupt Status Register */
    AT91_REG	 PIOA_MDER; 	/* Multi-driver Enable Register */
    AT91_REG	 PIOA_MDDR; 	/* Multi-driver Disable Register */
    AT91_REG	 PIOA_MDSR; 	/* Multi-driver Status Register */
    AT91_REG	 Reserved9[1]; 	/*  */
    AT91_REG	 PIOA_PPUDR; 	/* Pull-up Disable Register */
    AT91_REG	 PIOA_PPUER; 	/* Pull-up Enable Register */
    AT91_REG	 PIOA_PPUSR; 	/* Pad Pull-up Status Register */
    AT91_REG	 Reserved10[1]; 	/*  */
    AT91_REG	 PIOA_ASR; 	/* Select A Register */
    AT91_REG	 PIOA_BSR; 	/* Select B Register */
    AT91_REG	 PIOA_ABSR; 	/* AB Select Status Register */
    AT91_REG	 Reserved11[9]; 	/*  */
    AT91_REG	 PIOA_OWER; 	/* Output Write Enable Register */
    AT91_REG	 PIOA_OWDR; 	/* Output Write Disable Register */
    AT91_REG	 PIOA_OWSR; 	/* Output Write Status Register */
    AT91_REG	 Reserved12[85]; 	/*  */
    AT91_REG	 PIOB_PER; 	/* PIO Enable Register */
    AT91_REG	 PIOB_PDR; 	/* PIO Disable Register */
    AT91_REG	 PIOB_PSR; 	/* PIO Status Register */
    AT91_REG	 Reserved13[1]; 	/*  */
    AT91_REG	 PIOB_OER; 	/* Output Enable Register */
    AT91_REG	 PIOB_ODR; 	/* Output Disable Registerr */
    AT91_REG	 PIOB_OSR; 	/* Output Status Register */
    AT91_REG	 Reserved14[1]; 	/*  */
    AT91_REG	 PIOB_IFER; 	/* Input Filter Enable Register */
    AT91_REG	 PIOB_IFDR; 	/* Input Filter Disable Register */
    AT91_REG	 PIOB_IFSR; 	/* Input Filter Status Register */
    AT91_REG	 Reserved15[1]; 	/*  */
    AT91_REG	 PIOB_SODR; 	/* Set Output Data Register */
    AT91_REG	 PIOB_CODR; 	/* Clear Output Data Register */
    AT91_REG	 PIOB_ODSR; 	/* Output Data Status Register */
    AT91_REG	 PIOB_PDSR; 	/* Pin Data Status Register */
    AT91_REG	 PIOB_IER; 	/* Interrupt Enable Register */
    AT91_REG	 PIOB_IDR; 	/* Interrupt Disable Register */
    AT91_REG	 PIOB_IMR; 	/* Interrupt Mask Register */
    AT91_REG	 PIOB_ISR; 	/* Interrupt Status Register */
    AT91_REG	 PIOB_MDER; 	/* Multi-driver Enable Register */
    AT91_REG	 PIOB_MDDR; 	/* Multi-driver Disable Register */
    AT91_REG	 PIOB_MDSR; 	/* Multi-driver Status Register */
    AT91_REG	 Reserved16[1]; 	/*  */
    AT91_REG	 PIOB_PPUDR; 	/* Pull-up Disable Register */
    AT91_REG	 PIOB_PPUER; 	/* Pull-up Enable Register */
    AT91_REG	 PIOB_PPUSR; 	/* Pad Pull-up Status Register */
    AT91_REG	 Reserved17[1]; 	/*  */
    AT91_REG	 PIOB_ASR; 	/* Select A Register */
    AT91_REG	 PIOB_BSR; 	/* Select B Register */
    AT91_REG	 PIOB_ABSR; 	/* AB Select Status Register */
    AT91_REG	 Reserved18[9]; 	/*  */
    AT91_REG	 PIOB_OWER; 	/* Output Write Enable Register */
    AT91_REG	 PIOB_OWDR; 	/* Output Write Disable Register */
    AT91_REG	 PIOB_OWSR; 	/* Output Write Status Register */
    AT91_REG	 Reserved19[85]; 	/*  */
    AT91_REG	 PIOC_PER; 	/* PIO Enable Register */
    AT91_REG	 PIOC_PDR; 	/* PIO Disable Register */
    AT91_REG	 PIOC_PSR; 	/* PIO Status Register */
    AT91_REG	 Reserved20[1]; 	/*  */
    AT91_REG	 PIOC_OER; 	/* Output Enable Register */
    AT91_REG	 PIOC_ODR; 	/* Output Disable Registerr */
    AT91_REG	 PIOC_OSR; 	/* Output Status Register */
    AT91_REG	 Reserved21[1]; 	/*  */
    AT91_REG	 PIOC_IFER; 	/* Input Filter Enable Register */
    AT91_REG	 PIOC_IFDR; 	/* Input Filter Disable Register */
    AT91_REG	 PIOC_IFSR; 	/* Input Filter Status Register */
    AT91_REG	 Reserved22[1]; 	/*  */
    AT91_REG	 PIOC_SODR; 	/* Set Output Data Register */
    AT91_REG	 PIOC_CODR; 	/* Clear Output Data Register */
    AT91_REG	 PIOC_ODSR; 	/* Output Data Status Register */
    AT91_REG	 PIOC_PDSR; 	/* Pin Data Status Register */
    AT91_REG	 PIOC_IER; 	/* Interrupt Enable Register */
    AT91_REG	 PIOC_IDR; 	/* Interrupt Disable Register */
    AT91_REG	 PIOC_IMR; 	/* Interrupt Mask Register */
    AT91_REG	 PIOC_ISR; 	/* Interrupt Status Register */
    AT91_REG	 PIOC_MDER; 	/* Multi-driver Enable Register */
    AT91_REG	 PIOC_MDDR; 	/* Multi-driver Disable Register */