📄 nrf24l01.c
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IO0CLR = CSN; // CSN low, initialize SPI communication...
SPI_RW(reg); // Select register to read from..
reg_val = SPI_RW(0); // ..then read registervalue
IO0SET = CSN; // CSN high, terminate SPI communication
return(reg_val); // return register value
}
/**************************************************/
/**************************************************
Function: SPI_Read_Buf();
Description:
Reads 'bytes' #of bytes from register 'reg'
Typically used to read RX payload, Rx/Tx address
**************************************************/
unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
unsigned char status,byte_ctr;
IO0CLR = CSN; // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status byte
for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
pBuf[byte_ctr] = SPI_RW(0); // Perform SPI_RW to read byte from nRF24L01
IO0SET = CSN; // Set CSN high again
return(status); // return nRF24L01 status byte
}
/**************************************************/
/**************************************************
Function: SPI_Write_Buf();
Description:
Writes contents of buffer '*pBuf' to nRF24L01
Typically used to write TX payload, Rx/Tx address
**************************************************/
unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
unsigned char status,byte_ctr;
IO0CLR = CSN; // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status byte
for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
SPI_RW(*pBuf++);
IO0SET = CSN; // Set CSN high again
return(status); // return nRF24L01 status byte
}
/**************************************************/
/**************************************************
Function: RX_Mode();
Description:
This function initializes one nRF24L01 device to
RX Mode, set RX address, writes RX payload width,
select RF channel, datarate & LNA HCURR.
After init, CE is toggled high, which means that
this device is now ready to receive a datapacket.
**************************************************/
void RX_Mode(unsigned char *address) //监听指定地址,即赋予本机为该监听地址
{
IO0CLR = CE;
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, address, ADR_WIDTH); // Use the same address on the RX device as the TX device
// 注册 RX_ADDR_P0 地址为 Local_ADDRESS ,并使其自动应答 , 即监听本地地址信息
SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
SPI_RW_Reg(WRITE_REG + RX_PW_P0, PLOAD_WIDTH); // Select same RX payload width as TX Payload width
SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..
IO0SET = CE; // Set CE pin high to enable RX device
// This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
// '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
}
/**************************************************/
/**************************************************
Function: TX_Mode();
Description:
This function initializes one nRF24L01 device to
TX mode, set TX address, set RX address for auto.ack,
fill TX payload, select RF channel, datarate & TX pwr.
PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
ToDo: One high pulse(>10us) on CE will now send this
packet and expext an acknowledgment from the RX device.
**************************************************/
void TX_Mode(unsigned char *address) //发送到指定地址
{
IO0CLR = CE;
SPI_Write_Buf(WRITE_REG + TX_ADDR, address, ADR_WIDTH); // Writes TX_Address to nRF24L01
// 注册 TX_ADDR 为 TX_ADDRESS ,即发送目标地址
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, address, ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
// 注册 RX_ADDR_P0 为 TX_ADDRESS ,即自动应答目标
SPI_Write_Buf(WR_TX_PLOAD, tx_buf, PLOAD_WIDTH); // Writes data to TX payload
SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
IO0SET = CE;
}
/**************************************************/
/**************************************************
Function: IRQ_Eint(void);
Description:
if RX_DR=1 or TX_DS or MAX_RT=1,enter this subprogram;
if RX_DR=1,read the payload from RX_FIFO and set flag;
**************************************************/
//void __irq IRQ_Eint(void)
void IRQ_Eint(void)
{
sta = SPI_Read(STATUS); // read register STATUS's value
if(RX_DR) // if receive data ready (RX_DR) interrupt
{
SPI_Read_Buf(RD_RX_PLOAD,rx_buf,PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
flag = 1;
}
if(MAX_RT)
{
SPI_RW_Reg(FLUSH_TX,0);
}
SPI_RW_Reg(WRITE_REG+STATUS,sta);// clear RX_DR or TX_DS or MAX_RT interrupt flag
}
/**************************************************/
/**************************************************/
/**************************************************/
/**************************************************/
/**************************************************/
void delay_ms(unsigned int x)
{
unsigned int i,j;
i=0;
for(i=0;i<x;i++)
{
j=108;
;
while(j--);
}
}
int main(void)
{
init_io();
init_chip();
IO1CLR = LED1;
IO0CLR = LED2;
IO0CLR = LED3;
IO0CLR = LED4;
delay_ms(2000);
IO1SET = LED1;
IO0SET = LED2;
IO0SET = LED3;
IO0SET = LED4;
RX_Mode(Local_ADDRESS);
while(1)
{
IO0SET = TEST;
for(;;)
{
if((IO1PIN&IRQ_ARM) == 0)
{
IO0CLR = TEST;
IRQ_Eint();
break;
}
}
if(flag)
{
flag = 0;
if(rx_buf[0] == 0xe0) IO1CLR = LED1;
if(rx_buf[0] == 0xd0) IO0CLR = LED2;
if(rx_buf[0] == 0xb0) IO0CLR = LED3;
if(rx_buf[0] == 0x70) IO0CLR = LED4;
delay_ms(2000);
IO1SET = LED1;
IO0SET = LED2;
IO0SET = LED3;
IO0SET = LED4;
}
IO0CLR = TEST;
}
}
/*********************************************************************************************************
** End Of File
********************************************************************************************************/
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