📄 boot.s.bak2
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MODEMASK EQU 0xDF ;模式掩码
USERMODE EQU 0x10 ;用户模式
FIQMODE EQU 0x11 ;FIQ模式
IRQMODE EQU 0x12 ;IRQ模式
SVCMODE EQU 0x13 ;管理模式
ABORTMODE EQU 0x17 ;中止模式
UNDEFMODE EQU 0x1b ;未定义模式
SYSMODE EQU 0x1f ;系统模式
NOINT EQU 0xc0 ;禁止IRQ、FIQ中断
;########################################################################
DW_STACK_START EQU 0x31000000 ;堆栈地址
BOOT_RAM_BASE EQU 0x30000000 ;Boot程序运行地址
BOOT_RAM_SIZE EQU 128*1024 ;Boot程序大小
SDRAM_Start EQU 0x30000000 ;SDRAM起始地址,即内存起始地址
SDRAM_Size EQU 64*1024*1024 ;内存大小,64M
MMU_TLB_Siz EQU 16*1024
MMU_TLB_Base EQU 0x33e00000
MMU_FULL_ACCESS EQU (3<<10)
MMU_DOMAIN EQU (0<<5)
MMU_SPECIAL EQU (1<<4)
MMU_CACHEABLE EQU (1<<3)
MMU_BUFFERABLE EQU (1<<2)
MMU_SECTION EQU (2)
MMU_SECDESC EQU (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | MMU_SECTION)
MMU_SECTION_SIZE EQU 1*1024*1024
;外部晶振12MHz
[ 1=0 ;用于s3c2440
F_CLK EQU 400000000 ;400MHz
U_CLK EQU 48000000 ;48MHz
CLKDIV_VAL EQU 5 ;1:4:8
U_MDIV EQU 56
U_PDIV EQU 2
U_SDIV EQU 2
M_MDIV EQU 92
M_PDIV EQU 1
M_SDIV EQU 1
H_CLK EQU F_CLK/4
P_CLK EQU F_CLK/8
]
[ 1=1 ;用于s3c2410
F_CLK EQU 200000000 ;200MHz
U_CLK EQU 48000000 ;48MHz
CLKDIV_VAL EQU 3 ;1:2:4
U_MDIV EQU 120
U_PDIV EQU 2
U_SDIV EQU 3
M_MDIV EQU 92
M_PDIV EQU 1
M_SDIV EQU 1
H_CLK EQU F_CLK/2
P_CLK EQU F_CLK/4
]
[ 1=0 ;用于s3c2410
F_CLK EQU 60000000 ;60MHz
U_CLK EQU 48000000 ;48MHz
CLKDIV_VAL EQU 0 ;1:1:1
U_MDIV EQU 120
U_PDIV EQU 2
U_SDIV EQU 3
M_MDIV EQU 7
M_PDIV EQU 1
M_SDIV EQU 1
H_CLK EQU F_CLK/1
P_CLK EQU F_CLK/1
]
GET Boot_inc.s
IMPORT main
IMPORT __main
IMPORT nand_read_ll
AREA Boot, CODE, READONLY
CODE32
IMPORT Enter_UNDEF
IMPORT Enter_SWI
IMPORT Enter_PABORT
IMPORT Enter_DABORT
IMPORT Enter_FIQ
ENTRY
EXPORT __ENTRY
__ENTRY
ResetEntry
;===中断入口==========================================
B ColdReset
B Enter_UNDEF ;UndefinedInstruction
B Enter_SWI ;syscall_handler or SWI
B Enter_PABORT ;PrefetchAbort
B Enter_DABORT ;DataAbort
B . ;ReservedHandler
B IRQ_Handler ;IRQHandler
B Enter_FIQ ;FIQHandler
;===处理IRQ中断=======================================
EXPORT IRQ_Handler
IRQ_Handler
IMPORT ISR_IrqHandler
STMFD sp!, {r0-r12, lr}
BL ISR_IrqHandler
LDMFD sp!, {r0-r12, lr}
SUBS pc, lr, #4
LTORG
;===上电、复位入口====================================
ColdReset
;===关闭看门狗========================================
;LDR指令后带“=”,变为伪指令;下面指令功效一样
LDR R1,=WatchDog ;MOV R1,#WatchDog
LDR R2,=0x0 ;MOV R2,#0x0
STR R2,[R1,#oWTCON]
;===禁止全部中断======================================
LDR R1,=INT_CTL_BASE ;MOV R1,#INT_CTL_BASE
LDR R2,=0xFFFFFFFF ;MOV R2,#0xFFFFFFFF
STR R2,[R1,#oINTMSK]
LDR R2,=0xFFF ;MOV R2,#0x7FF
STR R2,[R1,#oINTSUBMSK]
;===设置系统时钟======================================
;===12MHz晶振 -> 48MHz -> 400MHz
; MRC p15,0,R3,c1,c0,0 ;读协处理器
; ORR R3,R3,#0xC0000000 ;1100...异步
; MCR p15,0,R3,c1,c0,0 ;写协处理器
MOV R1,#CLK_CTL_BASE
LDR R2,=0x00FFFFFF
STR R2,[R1,#oLOCKTINE]
LDR R2,=CLKDIV_VAL ;X=F:H:P 0=1:1:1, 1=1:1:2, 2=1:2:2, 3=1:2:4, 4=1:4:4, 5=1:4:8, 6=1:3:3, 7=1:3:6
STR R2,[R1,#oCLKDIVN]
LDR R2,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV)
STR R2,[R1,#oMPLLCON]
NOP
NOP
NOP
NOP
NOP
NOP
NOP
LDR R2,=((U_MDIV<<12)+(U_PDIV<<4)+U_SDIV)
STR R2,[R1,#oUPLLCON]
NOP
NOP
NOP
NOP
NOP
NOP
NOP
;===初始化存储空间(SDRAM)====================================
LDR R1,=MEM_CTL_BASE
LDR R2,=0x22111110 ;0x2211D110 ;0x2212D110
STR R2,[R1,#oBWSCON]
LDR R2,=0x00000700 ;0x00000F40
STR R2,[R1,#oBANKCON0]
LDR R2,=0x00000700 ;0x00002E50
STR R2,[R1,#oBANKCON1]
LDR R2,=0x00000700 ;0x00002E50
STR R2,[R1,#oBANKCON2]
LDR R2,=0x00000700 ;0x00002E50
STR R2,[R1,#oBANKCON3]
LDR R2,=0x00000700 ;0x00002E50
STR R2,[R1,#oBANKCON4]
LDR R2,=0x00000700 ;0x00002E50
STR R2,[R1,#oBANKCON5]
LDR R2,=(3<<15)|(0<<2)|(1<<0)
STR R2,[R1,#oBANKCON6]
LDR R2,=(3<<15)|(0<<2)|(1<<0)
STR R2,[R1,#oBANKCON7]
LDR R2,=(1<<23)|(0<<22)|(0<<20)|(3<<18)|(2049-936) ;2049-H_CLK*t
STR R2,[R1,#oREFRESH]
LDR R2,=(0<<7)|(1<<5)|(1<<4)|(2<<0)
STR R2,[R1,#oBANKSIZE]
LDR R2,=(0<<9)|(0<<7)|(3<<4)|(0<<0)
STR R2,[R1,#oMRSRB6]
LDR R2,=(0<<9)|(0<<7)|(3<<4)|(0<<0)
STR R2,[R1,#oMRSRB7]
;===清空SDRAM空间====================================
; LDR R0,=SDRAM_Start
; LDR R1,=SDRAM_Size
; BL MEMClear
;===建立内存映射表,使用MMU和Cache=====================
BL MEM_mapping_liner
BL ARM920T_Setup
;===初始化模式,并设置堆栈============================
MRS R0,CPSR
BIC R0,R0,#MODEMASK ;1101_1111
ORR R1,R0,#SVCMODE|NOINT
MSR cpsr_cxsf,R1
;===检查启动方式======================================
LDR R0,=(MEM_CTL_BASE+oBWSCON) ;Bus width & wait status
LDR R0,[R0]
ANDS R0,R0,#6 ;OM[1:0] != 0, NOR FLash boot
BNE not_copy ;NOR FLash启动,则无需复制
ADR R0,ResetEntry ;OM[1:0] == 0, NAND FLash boot
CMP R0,#0 ;运行地址正确,则无需再复制
BNE not_copy ;
BL copy_myself ;将Boot程序从Flash复制到SDRAM
;=====================================================
;===以上程序完成Boot程序的复制,运行了两次
;===以下程序将在正确位置(SDRAM)上运行
;=====================================================
; jump to ram
LDR R1,=on_the_ram
ADD PC,R1,#0
NOP
NOP
B .
on_the_ram
not_copy
;===跳到C语言入口=====================================
LDR SP,=DW_STACK_START ; setup stack pointer
MOV FP,#0 ; no previous frame, so fp=0
MOV a2,#0 ; set argv to NULL
BL main ; call main
NOP
NOP
B .
;=====================================================
;=====================================================
;=====================================================
;===内存清零==========================================
; clear memory
; R0: start address
; R1: length
; void MEMClear(unsigned long addr,unsigned long len)
EXPORT MEMClear
MEMClear
MOV R2,#0
MOV R3,#0
MOV R4,#0
MOV R5,#0
MOV R6,#0
MOV R7,#0
MOV R8,#0
MOV R9,#0
clear_loop
STMIA R0!,{R2-R9}
SUBS R1,R1,#(8 * 4)
BNE clear_loop
MOV PC,LR
;======================================================
; copy_myself: Copy from Flash to RAM
;======================================================
copy_myself
MOV R10,LR ;保护PC指针
; reset NAND
MOV R1,#NAND_CTL_BASE
LDR R2,=(1<<15)|(1<<12)|(1<<11)|(0<<8)|(3<<4)|(0<<0) ; 1111_1000_0011_0000
STR R2,[R1,#oNFCONF]
LDR R2,[R1,#oNFCONF]
BIC R2,R2,#(1<<11) ;0x800-->1000_0000_0000 ; enable chip
STR R2,[R1,#oNFCONF]
MOV R2,#0xff ; RESET command
STRB R2,[R1,#oNFCMD]
MOV R3,#0 ; wait
1
ADD R3,R3,#0x1
CMP R3,#0xa
BLT %B1
2
LDR R2,[R1,#oNFSTAT] ; wait ready
TST R2,#0x1
BEQ %B2
LDR R2,[R1,#oNFCONF]
ORR R2,R2,#(1<<11) ;0x800-->1000_0000_0000 ; disable chip
STR R2,[R1,#oNFCONF]
; get read to call C functions (for nand_read())
LDR SP,=DW_STACK_START ; setup stack pointer
MOV FP,#0 ; no previous frame, so fp=0
; copy BOOT to RAM
LDR R0,=BOOT_RAM_BASE
MOV R1,#0x0 ; Read from Flash at 0x00
LDR R2,=BOOT_RAM_SIZE ; Set Boot_Ram size
BL nand_read_ll
TST R0,#0x0
BEQ ok_nand_read
bad_nand_read
;MOV R0,#'?'
;BL PrintChar
B bad_nand_read ; infinite loop
ok_nand_read
;MOV R0,#'O'
;BL PrintChar
;MOV R0,#'K'
;BL PrintChar
;MOV R0,#'!'
;BL PrintChar
MOV PC,R10
;===建立页表,修改SDRAM空间对应页表使用cache============
; void MEM_mapping_liner(void)
EXPORT MEM_mapping_liner
MEM_mapping_liner
MOV R0,#0
0
MOV R1,R0,LSL #20 ;R1 = (R0<<20)
LDR R2,=MMU_TLB_Base
;ADD R2,R2,R0 ;R2 = MMU_TLB_Base+R0
ADD R2,R2,R0,LSL #2 ;R2 = MMU_TLB_Base+(R0<<2)
LDR R3,=MMU_SECDESC
ORR R3,R3,R1 ;R3 = MMU_SECDESC | R1
STR R3,[R2] ;[R2] <- R3
ADD R0,R0,#1 ;R0+1
CMP R0,#4096
BNE %B0
;---------------------------------
MOV R4,#0
LDR R0,=SDRAM_Start
MOV R1,R0,LSR #20 ;R1 = R0>>20
1
LDR R2,=MMU_TLB_Base
ADD R2,R2,R1 ;R2 = MMU_TLB_Base+R1
ADD R2,R2,R4,LSL #2 ;R2 = R2+(R4<<2)
LDR R3,=MMU_SECDESC
ORR R3,R3,#MMU_CACHEABLE
ORR R3,R3,R0 ;R3 = R0 | MMU_SECDESC | MMU_CACHEABLE
STR R3,[R2] ;[R2] <- R3
ADD R4,R4,#1 ;
ADD R0,R0,#(1*1024*1024) ;R0+1M
CMP R0,#(SDRAM_Start+SDRAM_Size)
BNE %B1
;---------------------------------
MOV PC,LR
;===启动MMU Cache=====================================
; void ARM920T_Setup(void)
EXPORT ARM920T_Setup
ARM920T_Setup
MOV R0,#0
MCR p15,0,R0,c7,c7,0 ;I_D_Cache无效
MCR p15,0,R0,c7,c10,4 ;清空Write Buffer
MCR p15,0,R0,c8,c7,0 ;I_D_TLBs无效
LDR R0,=MMU_TLB_Base
MCR p15,0,R0,c2,c0,0 ;设置页表指针
MVN R0,#0
MCR p15,0,R0,c3,c0,0 ;设置区域访问权限
MRC p15,0,R0,c1,c0,0 ; .RVI ..RS B... .CAM 先清位,再选择
BIC R0,R0,#0x3000 ; ..11 .... .... .... 清 V I
BIC R0,R0,#0x0300 ; .... ..11 .... .... 清 R S
BIC R0,R0,#0x0087 ; .... .... 1... .111 清 B C A M
ORR R0,R0,#0x0002 ; .... .... .... ..1. 故障检测使能
ORR R0,R0,#0x0004 ; .... .... .... .1.. DCache使能
ORR R0,R0,#0x1000 ; ...1 .... .... .... ICache使能
ORR R0,R0,#0x0001 ; .... .... .... ...1 MMU使能
MCR p15,0,R0,c1,c0,0 ;
MOV PC,LR
END
END
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