📄 boot.s.bak1

📁 基于s3c2410、2440的从SD卡引导Linux内核程序
💻 BAK1
字号:
MODEMASK	EQU	0xDF	;模式掩码
USERMODE	EQU	0x10	;用户模式
FIQMODE		EQU	0x11	;FIQ模式
IRQMODE		EQU	0x12	;IRQ模式
SVCMODE		EQU	0x13	;管理模式
ABORTMODE	EQU	0x17	;中止模式
UNDEFMODE	EQU	0x1b	;未定义模式
SYSMODE		EQU	0x1f	;系统模式
NOINT		EQU	0xc0	;禁止IRQ、FIQ中断
;########################################################################
Reserved		EQU	16*1024				;保留区，安全带

SDRAM_Start		EQU	0x30000000			;SDRAM起始地址，即内存起始地址
SDRAM_Size		EQU	64*1024*1024		;内存大小,64M
STACK_Size		EQU	32*1024				;放置堆栈区在内存最后段,32K
_STACK_BASEADDRESS	EQU SDRAM_Start+SDRAM_Size-STACK_Size	;堆栈基地址
UserStack	EQU	(_STACK_BASEADDRESS-0x3800)	;0x33ff4800 ~
SVCStack	EQU	(_STACK_BASEADDRESS-0x2800)	;0x33ff5800 ~
UndefStack	EQU	(_STACK_BASEADDRESS-0x2400)	;0x33ff5c00 ~
AbortStack	EQU	(_STACK_BASEADDRESS-0x2000)	;0x33ff6000 ~
IRQStack	EQU	(_STACK_BASEADDRESS-0x1000)	;0x33ff7000 ~
FIQStack	EQU	(_STACK_BASEADDRESS-0x0)	;0x33ff8000 ~

MMU_TLB_Siz		EQU	16*1024
MMU_TLB_Base	EQU	SDRAM_Start+SDRAM_Size-STACK_Size-Reserved-MMU_TLB_Siz

MMU_FULL_ACCESS		EQU	(3<<10)
MMU_DOMAIN			EQU	(0<<5)
MMU_SPECIAL			EQU	(1<<4)
MMU_CACHEABLE		EQU	(1<<3)
MMU_BUFFERABLE		EQU	(1<<2)
MMU_SECTION			EQU	(2)
MMU_SECDESC			EQU	(MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SPECIAL | MMU_SECTION)
MMU_SECTION_SIZE	EQU	1*1024*1024

;外部晶振12MHz
	[	1=0
FCLK		EQU	400000000	;400MHz
UCLK		EQU	48000000	;48MHz
CLKDIV_VAL	EQU	5			;1:4:8
U_MDIV		EQU	56
U_PDIV		EQU	2
U_SDIV		EQU	2
M_MDIV		EQU	92
M_PDIV		EQU	1
M_SDIV		EQU	1

MCLK		EQU	FCLK/8		;50MHz
BAUD		EQU	115200		;
	]

	[	1=1
FCLK		EQU	90000000	;208MHz
UCLK		EQU	48000000	;48MHz
CLKDIV_VAL	EQU	5			;1:4:8
U_MDIV		EQU	120
U_PDIV		EQU	2
U_SDIV		EQU	3
M_MDIV		EQU	112
M_PDIV		EQU	2
M_SDIV		EQU	2

MCLK		EQU	FCLK/8		;26MHz
BAUD		EQU	9600		;
	]
	GET	Boot_inc.s

	IMPORT	main
	IMPORT	__main
	
	AREA	Boot,	CODE,	READONLY
	CODE32
	ENTRY

;===中断入口==========================================
	B	reset
	B	undefined_instruction
	B	software_interrupt
	B	prefetch_abort
	B	data_abort
	B	not_used
	B	irq
	B	fiq
;===钩子函数==========================================
undefined_instruction
software_interrupt
prefetch_abort
data_abort
not_used
irq
fiq
	B	.
;===上电、复位入口====================================
reset
;===关闭看门狗========================================
;LDR指令后带“=”，变为伪指令；下面指令功效一样
	LDR	R1,=WatchDog	;MOV	R1,#WatchDog
	LDR	R2,=0x0			;MOV	R2,#0x0
	STR	R2,[R1,#oWTCON]
	
;===禁止全部中断======================================
	LDR	R1,=INT_CTL_BASE	;MOV	R1,#INT_CTL_BASE
	LDR	R2,=0xFFFFFFFF		;MOV	R2,#0xFFFFFFFF
	STR	R2,[R1,#oINTMSK]
	LDR	R2,=0xFFF			;MOV	R2,#0x7FF
	STR	R2,[R1,#oINTSUBMSK]
	
;===设置系统时钟======================================
;===12MHz晶振 -> 48MHz -> 400MHz
	MRC	p15,0,R3,c1,c0,0		;读协处理器
	ORR	R3,R3,#0xC0000000		;1100...异步
	MCR	p15,0,R3,c1,c0,0		;写协处理器
	
	MOV	R1,#CLK_CTL_BASE
	LDR	R2,=0x00FFFFFF
	STR	R2,[R1,#oLOCKTINE]
	LDR	R2,=CLKDIV_VAL			;X=F:H:P 0=1:1:1, 1=1:1:2, 2=1:2:2, 3=1:2:4, 4=1:4:4, 5=1:4:8, 6=1:3:3, 7=1:3:6
	STR	R2,[R1,#oCLKDIVN]
	LDR	R2,=((U_MDIV<<12)+(U_PDIV<<4)+U_SDIV)
	STR	R2,[R1,#oUPLLCON]
	NOP
	NOP
	NOP
	NOP
	NOP
	NOP
	NOP
	LDR	R2,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV)
	STR	R2,[R1,#oMPLLCON]
	
;===初始化UART0=======================================
	LDR	R1,=GPIO_CTL_BASE
	MOV	R2,#0xAA			;1010 1010
	STR	R2,[R1,#oGPHCON]
	MOV	R2,#0x0F			;00 0000 1111
	STR	R2,[R1,#oGPHUP]
	BL	InitUART0
	;------------------
	MOV	R0,#'U'
	BL	PrintChar
	MOV	R0,#'A'
	BL	PrintChar
	MOV	R0,#'R'
	BL	PrintChar
	MOV	R0,#'T'
	BL	PrintChar
	MOV	R0,#' '
	BL	PrintChar
	MOV	R0,#'O'
	BL	PrintChar
	MOV	R0,#'K'
	BL	PrintChar
	MOV	R0,#'\n'
	BL	PrintChar
	MOV	R0,#'\r'
	BL	PrintChar
	
;===初始化存储空间(SDRAM)====================================
	LDR	R1,=MEM_CTL_BASE
	LDR	R2,=0x2212D110
	STR	R2,[R1,#oBWSCON]
	LDR	R2,=0x00000F40
	STR	R2,[R1,#oBANKCON0]
	LDR	R2,=0x00002E50
	STR	R2,[R1,#oBANKCON1]
	LDR	R2,=0x00002E50
	STR	R2,[R1,#oBANKCON2]
	LDR	R2,=0x00002E50
	STR	R2,[R1,#oBANKCON3]
	LDR	R2,=0x00002E50
	STR	R2,[R1,#oBANKCON4]
	LDR	R2,=0x00002E50
	STR	R2,[R1,#oBANKCON5]
	LDR	R2,=0x00018005
	STR	R2,[R1,#oBANKCON6]
	LDR	R2,=0x00018005
	STR	R2,[R1,#oBANKCON7]
	LDR	R2,=0x00960542
	STR	R2,[R1,#oREFRESH]
	LDR	R2,=0x00000032
	STR	R2,[R1,#oBANKSIZE]
	MOV	R2,#0x00000030
	STR	R2,[R1,#oMRSRB6]
	MOV	R2,#0x00000030
	STR	R2,[R1,#oMRSRB7]

;===清空SDRAM空间====================================
;	LDR	R0,=SDRAM_Start
;	LDR	R1,=SDRAM_Size
;	BL	MEMClear

;===建立内存映射表,使用MMU和Cache=====================
	BL	MEM_mapping_liner
	BL	ARM920T_Setup
	
;===初始化模式，并设置堆栈============================
	MRS	R0,CPSR
	BIC R0,R0,#MODEMASK		;1101_1111
	
	ORR	R1,R0,#UNDEFMODE|NOINT
	MSR	cpsr_cxsf,R1
	LDR	SP,=UndefStack
	
	ORR	R1,R0,#ABORTMODE|NOINT
	MSR	cpsr_cxsf,R1
	LDR	SP,=AbortStack
	
	ORR	R1,R0,#IRQMODE|NOINT
	MSR	cpsr_cxsf,R1
	LDR	SP,=IRQStack
	
	ORR	R1,R0,#FIQMODE|NOINT
	MSR	cpsr_cxsf,R1
	LDR	SP,=FIQStack
	
	ORR	R1,R0,#SVCMODE|NOINT
	MSR	cpsr_cxsf,R1
	LDR	SP,=SVCStack
	
;===跳到C语言入口=====================================
	;B	__main
	LDR	R2,=main
	ADD	PC,R2,#0
	NOP
	NOP
	B	.

;=====================================================
;=====================================================
;=====================================================

;===初始化UART0=======================================
InitUART0
	LDR	R0,=UART0_CTL_BASE
	MOV	R1,#0x00
	STR	R1,[R0,#oUFCON]
	STR	R1,[R0,#oUMCON]
	MOV	R1,#0x03
	STR	R1,[R0,#oULCON]
	LDR	R1,=0x245
	STR	R1,[R0,#oUCON]
	MOV	R1,#((MCLK/4/(BAUD*16))-1)	;MOV	R1,#UART_BRD
	STR	R1,[R0,#oUBRDIV]
;===延时================
	MOV	R2,#100
0
	SUBS	R2,R2,#1
	BNE	%B0
;=======================
	MOV	PC,LR
	
;===发送一个字节======================================
; R0: The char
; void PrintChar(unsigned char s)
	EXPORT	PrintChar
PrintChar
	LDR	R1,=UART0_CTL_BASE
TXBusy
	LDR	R2,[R1,#oUTRSTAT]
	ANDS	R2,R2,#0x02			;0010
	;TST	R2,#0x02			;0010
	BEQ	TXBusy
	STR	R0,[R1,#oUTXH]
	MOV	PC,LR

;===内存清零==========================================
; clear memory
; R0: start address
; R1: length
; void MEMClear(unsigned long addr,unsigned long len)
	EXPORT	MEMClear
MEMClear
	MOV	R2,#0
	MOV	R3,#0
	MOV	R4,#0
	MOV	R5,#0
	MOV	R6,#0
	MOV	R7,#0
	MOV	R8,#0
	MOV	R9,#0
clear_loop
	STMIA	R0!,{R2-R9}
	SUBS	R1,R1,#(8 * 4)
	BNE	clear_loop
	MOV	PC,LR

;===使能MMU===========================================
; void MMU_Enable(void)
	EXPORT	MMU_Enable
MMU_Enable
	MRC	p15,0,R0,c1,c0,0
	ORR	R0,R0,#(1<<0)
	MCR	p15,0,R0,c1,c0,0
	MOV	PC,LR
	
;===禁用MMU===========================================
; void MMU_Disable(void)
	EXPORT	MMU_Disable
MMU_Disable
	MRC	p15,0,R0,c1,c0,0
	BIC	R0,R0,#(1<<0)
	MCR	p15,0,R0,c1,c0,0
	MOV	PC,LR
	
;===使能ICache========================================
; void MMU_EnableICache(void)
	EXPORT	MMU_EnableICache
MMU_EnableICache
	MRC	p15,0,R0,c1,c0,0
	ORR	R0,R0,#(1<<12)
	MCR	p15,0,R0,c1,c0,0
	MOV	PC,LR
;===禁用ICache========================================
; void MMU_DisableICache(void)
	EXPORT MMU_DisableICache
MMU_DisableICache
	MRC p15,0,R0,c1,c0,0
	BIC R0,R0,#(1<<12)
	MCR p15,0,R0,c1,c0,0
	MOV	PC,LR
;===使能DCache========================================
; void MMU_EnableDCache(void)
	EXPORT MMU_EnableDCache
MMU_EnableDCache
	MRC p15,0,R0,c1,c0,0
	ORR R0,R0,#(1<<2)
	MCR p15,0,R0,c1,c0,0
	MOV	PC,LR
;===禁用DCache========================================
; void MMU_DisableDCache(void)
	EXPORT MMU_DisableDCache
MMU_DisableDCache
	MRC p15,0,R0,c1,c0,0
	BIC R0,R0,#(1<<2)
	MCR p15,0,R0,c1,c0,0
	MOV	PC,LR
	
;===建立页表，修改SDRAM空间对应页表使用cache============
; void MEM_mapping_liner(void)
	EXPORT	MEM_mapping_liner
MEM_mapping_liner
	MOV	R0,#0
0	
	MOV	R1,R0,LSL #20		;R1 = (R0<<20)
	LDR	R2,=MMU_TLB_Base
	;ADD	R2,R2,R0			;R2 = MMU_TLB_Base+R0
	ADD	R2,R2,R0,LSL #2		;R2 = MMU_TLB_Base+(R0<<2)
	LDR	R3,=MMU_SECDESC
	ORR	R3,R3,R1			;R3 = MMU_SECDESC | R1
	STR	R3,[R2]				;[R2] <- R3
	ADD	R0,R0,#1			;R0+1
	CMP	R0,#4096
	BNE	%B0
;---------------------------------
	MOV	R4,#0
	LDR	R0,=SDRAM_Start
	MOV	R1,R0,LSR #20			;R1 = R0>>20
1	
	LDR	R2,=MMU_TLB_Base
	ADD	R2,R2,R1				;R2 = MMU_TLB_Base+R1
	ADD	R2,R2,R4,LSL #2			;R2 = R2+(R4<<2)
	LDR	R3,=MMU_SECDESC
	ORR	R3,R3,#MMU_CACHEABLE
	ORR	R3,R3,R0				;R3 = R0 | MMU_SECDESC | MMU_CACHEABLE
	STR	R3,[R2]					;[R2] <- R3
	ADD	R4,R4,#1				;
	ADD	R0,R0,#(1*1024*1024)	;R0+1M
	CMP	R0,#(SDRAM_Start+SDRAM_Size)
	BNE	%B1
;---------------------------------
	MOV	PC,LR

;===启动MMU Cache=====================================
; void ARM920T_Setup(void）
	EXPORT	ARM920T_Setup
ARM920T_Setup
	MOV	R0,#0
	MCR	p15,0,R0,c7,c7,0	;I_D_Cache无效
	MCR	p15,0,R0,c7,c10,4	;清空Write Buffer
	MCR	p15,0,R0,c8,c7,0	;I_D_TLBs无效
	
	LDR	R0,=MMU_TLB_Base
	MCR	p15,0,R0,c2,c0,0	;设置页表指针
	
	MVN	R0,#0
	MCR	p15,0,R0,c3,c0,0	;设置区域访问权限
	
	MRC	p15,0,R0,c1,c0,0	; .RVI ..RS B... .CAM	先清位,再选择
	BIC	R0,R0,#0x3000		; ..11 .... .... ....	清 V I
	BIC	R0,R0,#0x0300		; .... ..11 .... ....	清 R S
	BIC	R0,R0,#0x0087		; .... .... 1... .111	清 B C A M
	ORR	R0,R0,#0x0002		; .... .... .... ..1.	故障检测使能
	ORR	R0,R0,#0x0004		; .... .... .... .1..	DCache使能
	ORR	R0,R0,#0x1000		; ...1 .... .... ....	ICache使能
	ORR	R0,R0,#0x0001		; .... .... .... ...1	MMU使能
	MCR	p15,0,R0,c1,c0,0	;
	
	MOV	PC,LR
	
	END
💿 文件大小 230 K
👤 上传用户 kuaile13y
📂 所属分类微处理器开发
🏷️ 相关标签

#s3c2410 #Linux #2440 #SD卡
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