📄 pic18f4520.h
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/*==============================================================================================
** Filename : PIC18Fxx2.h
** Processor : PIC18F2420, PIC18F2520, PIC18F4420, PIC18F4520
** Beantype : Microprosessor Register Define File
** Format : HI-TECH PICC-18 V8.35 Compiler
===============================================================================================*/
/*============== ⒀ Port and Module Register Initialize Register Define ⑿ =================================*/
#define __PIC18F4520_H
static volatile near unsigned char TOSU @0xFFF;
static volatile near unsigned char TOSH @0xFFE;
static volatile near unsigned char TOSL @0xFFD;
static volatile near unsigned char STKPTR @0xFFC;
static volatile near unsigned char PCLATU @0xFFB;
static volatile near unsigned char PCLATH @0xFFA;
static volatile near unsigned char PCL @0xFF9;
static volatile far unsigned char * TBLPTR @0xFF6;
static volatile near unsigned char TBLPTRU @0xFF8;
static volatile near unsigned char TBLPTRH @0xFF7;
static volatile near unsigned char TBLPTRL @0xFF6;
static volatile near unsigned char TABLAT @0xFF5;
static volatile near unsigned char PRODH @0xFF4;
static volatile near unsigned char PRODL @0xFF3;
static volatile near unsigned char INTCON @0xFF2;
static near unsigned char INTCON2 @0xFF1;
static volatile near unsigned char INTCON3 @0xFF0;
static volatile near unsigned char INDF0 @0xFEF;
static volatile near unsigned char POSTINC0 @0xFEE;
static volatile near unsigned char POSTDEC0 @0xFED;
static volatile near unsigned char PREINC0 @0xFEC;
static volatile near unsigned char PLUSW0 @0xFEB;
static volatile near unsigned char FSR0H @0xFEA;
static volatile near unsigned char FSR0L @0xFE9;
static volatile near unsigned char WREG @0xFE8;
static volatile near unsigned char INDF1 @0xFE7;
static volatile near unsigned char POSTINC1 @0xFE6;
static volatile near unsigned char POSTDEC1 @0xFE5;
static volatile near unsigned char PREINC1 @0xFE4;
static volatile near unsigned char PLUSW1 @0xFE3;
static volatile near unsigned char FSR1H @0xFE2;
static volatile near unsigned char FSR1L @0xFE1;
static near unsigned char BSR @0xFE0;
static volatile near unsigned char INDF2 @0xFDF;
static volatile near unsigned char POSTINC2 @0xFDE;
static volatile near unsigned char POSTDEC2 @0xFDD;
static volatile near unsigned char PREINC2 @0xFDC;
static volatile near unsigned char PLUSW2 @0xFDB;
static volatile near unsigned char FSR2H @0xFDA;
static volatile near unsigned char FSR2L @0xFD9;
static volatile near unsigned char STATUS @0xFD8;
static volatile near unsigned char TMR0H @0xFD7;
static volatile near unsigned char TMR0L @0xFD6;
static near unsigned char T0CON @0xFD5;
static volatile near unsigned char OSCCON @0xFD3;
static volatile near unsigned char HLVDCON @0xFD2;
static volatile near unsigned char LVDCON @0xFD2;
static volatile near unsigned char WDTCON @0xFD1;
static volatile near unsigned char RCON @0xFD0;
static volatile near unsigned char TMR1H @0xFCF;
static volatile near unsigned char TMR1L @0xFCE;
static near unsigned char T1CON @0xFCD;
static volatile near unsigned char TMR2 @0xFCC;
static near unsigned char PR2 @0xFCB;
static near unsigned char T2CON @0xFCA;
static volatile near unsigned char SSPBUF @0xFC9;
static near unsigned char SSPADD @0xFC8;
static volatile near unsigned char SSPSTAT @0xFC7;
static volatile near unsigned char SSPCON1 @0xFC6;
static volatile near unsigned char SSPCON2 @0xFC5;
static volatile near unsigned char ADRESH @0xFC4;
static volatile near unsigned char ADRESL @0xFC3;
static volatile near unsigned int ADRES @0xFC3;
static volatile near unsigned char ADCON0 @0xFC2;
static near unsigned char ADCON1 @0xFC1;
static near unsigned char ADCON2 @0xFC0;
static volatile near unsigned char CCPR1H @0xFBF;
static volatile near unsigned char CCPR1L @0xFBE;
static volatile near unsigned char CCP1CON @0xFBD;
static volatile near unsigned char CCPR2H @0xFBC;
static volatile near unsigned char CCPR2L @0xFBB;
static volatile near unsigned char CCP2CON @0xFBA;
static volatile near unsigned char BAUDCON @0xFB8;
static volatile near unsigned char PWM1CON @0xFB7;
static volatile near unsigned char ECCP1AS @0xFB6;
static volatile near unsigned char CVRCON @0xFB5;
static volatile near unsigned char CMCON @0xFB4;
static volatile near unsigned char TMR3H @0xFB3;
static volatile near unsigned char TMR3L @0xFB2;
static volatile near unsigned int TMR3 @0xFB2;
static near unsigned char T3CON @0xFB1;
static near unsigned char SPBRGH @0xFB0;
static near unsigned char SPBRG @0xFAF;
static volatile near unsigned char RCREG @0xFAE;
static volatile near unsigned char TXREG @0xFAD;
static volatile near unsigned char TXSTA @0xFAC;
static volatile near unsigned char RCSTA @0xFAB;
static near unsigned char EEADR @0xFA9;
static volatile near unsigned char EEDATA @0xFA8;
static volatile near unsigned char EECON2 @0xFA7;
static volatile near unsigned char EECON1 @0xFA6;
static near unsigned char IPR2 @0xFA2;
static volatile near unsigned char PIR2 @0xFA1;
static near unsigned char PIE2 @0xFA0;
static near unsigned char IPR1 @0xF9F;
static volatile near unsigned char PIR1 @0xF9E;
static near unsigned char PIE1 @0xF9D;
static near unsigned char OSCTUNE @0xF9B;
static volatile near unsigned char TRISE @0xF96;
static volatile near unsigned char TRISD @0xF95;
static volatile near unsigned char TRISC @0xF94;
static volatile near unsigned char TRISB @0xF93;
static volatile near unsigned char TRISA @0xF92;
static volatile near unsigned char LATE @0xF8D;
static volatile near unsigned char LATD @0xF8C;
static volatile near unsigned char LATC @0xF8B;
static volatile near unsigned char LATB @0xF8A;
static volatile near unsigned char LATA @0xF89;
static volatile near unsigned char PORTE @0xF84;
static volatile near unsigned char PORTD @0xF83;
static volatile near unsigned char PORTC @0xF82;
static volatile near unsigned char PORTB @0xF81;
static volatile near unsigned char PORTA @0xF80;
/* Definitions for INTCON register */
static volatile near bit RBIF @((unsigned)&INTCON*8)+0;
static volatile near bit INT0IF @((unsigned)&INTCON*8)+1;
static volatile near bit TMR0IF @((unsigned)&INTCON*8)+2;
static near bit RBIE @((unsigned)&INTCON*8)+3;
static near bit INT0IE @((unsigned)&INTCON*8)+4;
static near bit TMR0IE @((unsigned)&INTCON*8)+5;
static near bit PEIE @((unsigned)&INTCON*8)+6;
static near bit GIE @((unsigned)&INTCON*8)+7;
/* Definitions for INTCON2 register */
static near bit RBIP @((unsigned)&INTCON2*8)+0;
static near bit TMR0IP @((unsigned)&INTCON2*8)+2;
static near bit INTEDG2 @((unsigned)&INTCON2*8)+4;
static near bit INTEDG1 @((unsigned)&INTCON2*8)+5;
static near bit INTEDG0 @((unsigned)&INTCON2*8)+6;
static near bit RBPU @((unsigned)&INTCON2*8)+7;
/* Definitions for INTCON3 register */
static volatile near bit INT1IF @((unsigned)&INTCON3*8)+0;
static volatile near bit INT2IF @((unsigned)&INTCON3*8)+1;
static near bit INT1IE @((unsigned)&INTCON3*8)+3;
static near bit INT2IE @((unsigned)&INTCON3*8)+4;
static near bit INT1IP @((unsigned)&INTCON3*8)+6;
static near bit INT2IP @((unsigned)&INTCON3*8)+7;
/* Definitions for T0CON register */
static near bit T0PS0 @((unsigned)&T0CON*8)+0;
static near bit T0PS1 @((unsigned)&T0CON*8)+1;
static near bit T0PS2 @((unsigned)&T0CON*8)+2;
static near bit PSA @((unsigned)&T0CON*8)+3;
static near bit T0SE @((unsigned)&T0CON*8)+4;
static near bit T0CS @((unsigned)&T0CON*8)+5;
static near bit T08BIT @((unsigned)&T0CON*8)+6;
static near bit TMR0ON @((unsigned)&T0CON*8)+7;
/* Definitions for T1CON register */
static near bit TMR1ON @((unsigned)&T1CON*8)+0;
static near bit TMR1CS @((unsigned)&T1CON*8)+1;
static near bit T1SYNC @((unsigned)&T1CON*8)+2;
static near bit T1OSCEN @((unsigned)&T1CON*8)+3;
static near bit T1CKPS0 @((unsigned)&T1CON*8)+4;
static near bit T1CKPS1 @((unsigned)&T1CON*8)+5;
static near bit T1RUN @((unsigned)&T1CON*8)+6;
static near bit T1RD16 @((unsigned)&T1CON*8)+7;
/* Definitions for T2CON register */
static near bit T2CKPS0 @((unsigned)&T2CON*8)+0;
static near bit T2CKPS1 @((unsigned)&T2CON*8)+1;
static near bit TMR2ON @((unsigned)&T2CON*8)+2;
static near bit T2OUTPS0@((unsigned)&T2CON*8)+3;
static near bit T2OUTPS1@((unsigned)&T2CON*8)+4;
static near bit T2OUTPS2@((unsigned)&T2CON*8)+5;
static near bit T2OUTPS3@((unsigned)&T2CON*8)+6;
/* Definitions for SSPSTAT register */
static volatile near bit BF @((unsigned)&SSPSTAT*8)+0;
static volatile near bit UA @((unsigned)&SSPSTAT*8)+1;
static volatile near bit RW @((unsigned)&SSPSTAT*8)+2;
static volatile near bit START @((unsigned)&SSPSTAT*8)+3;
static volatile near bit STOP @((unsigned)&SSPSTAT*8)+4;
static volatile near bit DA @((unsigned)&SSPSTAT*8)+5;
static near bit CKE @((unsigned)&SSPSTAT*8)+6;
static near bit SMP @((unsigned)&SSPSTAT*8)+7;
/* Definitions for SSPCON1 register */
static near bit SSPM0 @((unsigned)&SSPCON1*8)+0;
static near bit SSPM1 @((unsigned)&SSPCON1*8)+1;
static near bit SSPM2 @((unsigned)&SSPCON1*8)+2;
static near bit SSPM3 @((unsigned)&SSPCON1*8)+3;
static near bit CKP @((unsigned)&SSPCON1*8)+4;
static near bit SSPEN @((unsigned)&SSPCON1*8)+5;
static volatile near bit SSPOV @((unsigned)&SSPCON1*8)+6;
static volatile near bit WCOL @((unsigned)&SSPCON1*8)+7;
/* Definitions for SSPCON2 register */
static near bit SEN @((unsigned)&SSPCON2*8)+0;
static volatile near bit RSEN @((unsigned)&SSPCON2*8)+1;
static volatile near bit PEN @((unsigned)&SSPCON2*8)+2;
static volatile near bit RCEN @((unsigned)&SSPCON2*8)+3;
static volatile near bit ACKEN @((unsigned)&SSPCON2*8)+4;
static volatile near bit ACKDT @((unsigned)&SSPCON2*8)+5;
static volatile near bit ACKSTAT @((unsigned)&SSPCON2*8)+6;
static near bit GCEN @((unsigned)&SSPCON2*8)+7;
/* Definitions for ADCON0 register */
static near bit ADON @((unsigned)&ADCON0*8)+0;
static volatile near bit GODONE @((unsigned)&ADCON0*8)+1;
static near bit CHS0 @((unsigned)&ADCON0*8)+2;
static near bit CHS1 @((unsigned)&ADCON0*8)+3;
static near bit CHS2 @((unsigned)&ADCON0*8)+4;
static near bit CHS3 @((unsigned)&ADCON0*8)+5;
/* Definitions for ADCON1 register */
static near bit PCFG0 @((unsigned)&ADCON1*8)+0;
static near bit PCFG1 @((unsigned)&ADCON1*8)+1;
static near bit PCFG2 @((unsigned)&ADCON1*8)+2;
static near bit PCFG3 @((unsigned)&ADCON1*8)+3;
static near bit VCFG0 @((unsigned)&ADCON1*8)+4;
static near bit VCFG1 @((unsigned)&ADCON1*8)+5;
/* Definitions for ADCON2 register */
static near bit ADCS0 @((unsigned)&ADCON2*8)+0;
static near bit ADCS1 @((unsigned)&ADCON2*8)+1;
static near bit ADCS2 @((unsigned)&ADCON2*8)+2;
static near bit ACQT0 @((unsigned)&ADCON2*8)+3;
static near bit ACQT1 @((unsigned)&ADCON2*8)+4;
static near bit ACQT2 @((unsigned)&ADCON2*8)+5;
static near bit ADFM @((unsigned)&ADCON2*8)+7;
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