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📄 mypcioin.lst

📁 cypress usb CY7C68103A的控制输出固件还有上位机c++源码
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C51 COMPILER V7.50   MYPCIOIN                                                              05/27/2006 12:40:15 PAGE 1   


C51 COMPILER V7.50, COMPILATION OF MODULE MYPCIOIN
OBJECT MODULE PLACED IN MYPCIOIN.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE MYPCIOIN.c BROWSE DEBUG OBJECTEXTEND

line level    source

   1          #pragma NOIV                    // Do not generate interrupt vectors
   2          //-----------------------------------------------------------------------------
   3          //   File:      srcout_s.c
   4          //   Contents:  Hooks required to implement USB peripheral function.
   5          //              Code written for EZUSB FX2 128-pin REVE...
   6          //              Firmware tested on EZUSB FX2 128-pin (CY3681 DK)
   7          //   Copyright (c) 2001 Cypress Semiconductor All rights reserved
   8          //-----------------------------------------------------------------------------
   9          #include "fx2.h"
  10          #include "fx2regs.h"
  11          #include "fx2sdly.h"            // SYNCDELAY macro
  12          
  13          extern BOOL GotSUD;             // Received setup data flag
  14          extern BOOL Sleep;
  15          extern BOOL Rwuen;
  16          extern BOOL Selfpwr;
  17          
  18          BYTE Configuration;             // Current configuration
  19          BYTE AlternateSetting;          // Alternate settings
  20          
  21            // ...debug LEDs: accessed via movx reads only ( through CPLD )
  22          xdata volatile const BYTE LED0_ON  _at_ 0x8000;
  23          xdata volatile const BYTE LED0_OFF _at_ 0x8100;
  24          xdata volatile const BYTE LED1_ON  _at_ 0x9000;
  25          xdata volatile const BYTE LED1_OFF _at_ 0x9100;
  26          xdata volatile const BYTE LED2_ON  _at_ 0xA000;
  27          xdata volatile const BYTE LED2_OFF _at_ 0xA100;
  28          xdata volatile const BYTE LED3_ON  _at_ 0xB000;
  29          xdata volatile const BYTE LED3_OFF _at_ 0xB100;
  30            // it may be worth noting here that the default monitor loads at 0xC000
  31          
  32            // use this global variable when (de)asserting debug LEDs...
  33          BYTE ledX_rdvar = 0x00;
  34          
  35          BYTE xdata Digit[] = { 0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80, 0x98, 0x88, 0x83, 0xc6, 0xa1,
             - 0x86, 0x8e };
  36          
  37          #define BTN_ADDR                0x38
  38          #define LED_ADDR                0x39
  39          
  40          BYTE    num = 0;
  41          BYTE    display = TRUE;
  42          
  43          
  44          #define KEY_WAKEUP              0
  45          #define KEY_F1                  1
  46          #define KEY_F2                  2
  47          #define KEY_F3                  3
  48          
  49          //-----------------------------------------------------------------------------
  50          // Task Dispatcher hooks
  51          //   The following hooks are called by the task dispatcher.
  52          //-----------------------------------------------------------------------------
  53          void TD_Init( void )
  54          { // Called once at startup
C51 COMPILER V7.50   MYPCIOIN                                                              05/27/2006 12:40:15 PAGE 2   

  55   1      
  56   1        CPUCS = 0x10;                 // CLKSPD[1:0]=10, for 48MHz operation
  57   1                                      // CLKOE=0, don't drive CLKOUT
  58   1      
  59   1        IFCONFIG = 0xCB;
  60   1        // IFCLKSRC=1   , FIFOs executes on internal clk source
  61   1        // xMHz=1       , 48MHz internal clk rate
  62   1        // IFCLKOE=0    , Don't drive IFCLK pin signal at 48MHz
  63   1        // IFCLKPOL=0   , Don't invert IFCLK pin signal from internal clk
  64   1        // ASYNC=1      , master samples asynchronous
  65   1        // GSTATE=0     , Don't drive GPIF states out on PORTE[2:0], debug WF
  66   1        // IFCFG[1:0]=11, FX2 in slave FIFO mode
  67   1      
  68   1      
  69   1        // Registers which require a synchronization delay, see section 15.14
  70   1        // FIFORESET        FIFOPINPOLAR
  71   1        // INPKTEND         OUTPKTEND
  72   1        // EPxBCH:L         REVCTL
  73   1        // GPIFTCB3         GPIFTCB2
  74   1        // GPIFTCB1         GPIFTCB0
  75   1        // EPxFIFOPFH:L     EPxAUTOINLENH:L
  76   1        // EPxFIFOCFG       EPxGPIFFLGSEL
  77   1        // PINFLAGSxx       EPxFIFOIRQ
  78   1        // EPxFIFOIE        GPIFIRQ
  79   1        // GPIFIE           GPIFADRH:L
  80   1        // UDMACRCH:L       EPxGPIFTRIG
  81   1        // GPIFTRIG
  82   1        
  83   1        // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
  84   1        //      ...these have been replaced by GPIFTC[B3:B0] registers
  85   1        
  86   1        SYNCDELAY;                    // see TRM section 15.14
  87   1        REVCTL = 0x01;                // use enhanced packet handling
  88   1        
  89   1        // NOTE: when using "enhanced packet handling" feature (REVCTL.0=1)
  90   1        //       ...the core functions as follows:
  91   1        //        - OUTPKTEND is used to skip/commit OUT pkt.
  92   1        //        - INPKTEND is used to skip/commit IN pkt.
  93   1        //        - EPxBCH/L is used to 
  94   1        //          - commit cpu sourced pkt.
  95   1        //          - modify length of an OUT pkt.
  96   1        //        - cpu can not source an OUT pkt in "AUTOOUT" mode
  97   1        // - see cpu source out pkt method in BOOL DR_VendorCmnd(); ...
  98   1        
  99   1        // EP2 512 BULK OUT 4x
 100   1        SYNCDELAY;                    // 
 101   1        EP2CFG = 0xA0;                // BUF[1:0]=00 for 4x buffering
 102   1        
 103   1        // EP6 512 BULK IN 4x
 104   1        SYNCDELAY;                    // 
 105   1        EP6CFG = 0xE0;                // BUF[1:0]=00 for 4x buffering
 106   1        
 107   1        // EP4 and EP8 are not used in this implementation...
 108   1        SYNCDELAY;                    // 
 109   1        EP4CFG = 0x20;                // clear valid bit
 110   1        SYNCDELAY;                    // 
 111   1        EP8CFG = 0x60;                // clear valid bit
 112   1      
 113   1        SYNCDELAY;                    // 
 114   1        FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions
 115   1        SYNCDELAY;                    // 
 116   1        FIFORESET = 0x02;             // reset, FIFO 2
C51 COMPILER V7.50   MYPCIOIN                                                              05/27/2006 12:40:15 PAGE 3   

 117   1        SYNCDELAY;                    // 
 118   1        FIFORESET = 0x04;             // reset, FIFO 4
 119   1        SYNCDELAY;                    // 
 120   1        FIFORESET = 0x06;             // reset, FIFO 6
 121   1        SYNCDELAY;                    // 
 122   1        FIFORESET = 0x08;             // reset, FIFO 8
 123   1        SYNCDELAY;                    // 
 124   1        FIFORESET = 0x00;             // deactivate NAK-ALL
 125   1      
 126   1        // 8-bit bus (WORDWIDE=0)...
 127   1      
 128   1        // use manual out mode...
 129   1        SYNCDELAY;                    // 
 130   1        EP2FIFOCFG = 0x00;            // AUTOOUT=0, WORDWIDE=0
 131   1        
 132   1        SYNCDELAY;                    // 
 133   1        OUTPKTEND = 0x82;             // arm first buffer
 134   1        SYNCDELAY;                    // 
 135   1        OUTPKTEND = 0x82;             // arm second buffer
 136   1        SYNCDELAY;                    // 
 137   1        OUTPKTEND = 0x82;             // arm third buffer
 138   1        SYNCDELAY;                    // 
 139   1        OUTPKTEND = 0x82;             // arm fourth buffer
 140   1      
 141   1        // use auto in mode
 142   1        SYNCDELAY;                    // 
 143   1        EP6FIFOCFG = 0x0C;            // AUTOIN=1, ZEROLENIN=1, WORDWIDE=0
 144   1      }
 145          
 146          void TD_Poll( void )
 147          { // Called repeatedly while the device is idle
 148   1      
 149   1        // see BOOL DR_VendorCmnd( void );
 150   1        // ...core "auto" commits pkts using EP6AUTOINLENH/L value
 151   1          BYTE xdata  buttons;
 152   1              BYTE    kstates = 0xff;
 153   1              BYTE    kdeltas;
 154   1              BYTE    key;
 155   1      
 156   1                      EZUSB_Delay (200); 
 157   1                      EZUSB_ReadI2C(BTN_ADDR,0x01,&buttons);  // Read button states
 158   1      
 159   1                      kdeltas = kstates ^ buttons;                    // 
 160   1                      kstates = buttons;
 161   1                      key = 0;
 162   1      
 163   1                      while(kdeltas)
 164   1                      {
 165   2                              if(kdeltas & 0x01)
 166   2                              {
 167   3                                      if(!((kstates >> key) & 0x01))
 168   3                                              switch(key)
 169   3                                              {
 170   4                                                      case KEY_F1:
 171   4                                                              if(--num > 0x0f)
 172   4                                                                      num = 0x0f;
 173   4                                                              break;
 174   4                                                      case KEY_F2:
 175   4                                                              if(++num > 0x0f)
 176   4                                                                      num = 0;
 177   4                                                              break;
 178   4                                                      case KEY_WAKEUP:
C51 COMPILER V7.50   MYPCIOIN                                                              05/27/2006 12:40:15 PAGE 4   

 179   4                                                              num = 0;
 180   4                                                              break;
 181   4                                                      case KEY_F3:
 182   4                                                              num = 0x0f;
 183   4                                              }
 184   3                                      display = TRUE;
 185   3                              }
 186   2                              kdeltas = kdeltas >> 1;
 187   2                              ++key;
 188   2                      }
 189   1                      if(display)
 190   1                      {
 191   2                              EZUSB_WriteI2C(LED_ADDR, 0x01, &(Digit[num]));
 192   2                              EZUSB_WaitForEEPROMWrite(LED_ADDR);
 193   2                              display = FALSE;
 194   2                      }
 195   1      
 196   1      }
 197          
 198          BOOL TD_Suspend( void )          
 199          { // Called before the device goes into suspend mode
 200   1         return( TRUE );
 201   1      }
 202          
 203          BOOL TD_Resume( void )          
 204          { // Called after the device resumes
 205   1         return( TRUE );
 206   1      }
 207          
 208          //-----------------------------------------------------------------------------
 209          // Device Request hooks
 210          //   The following hooks are called by the end point 0 device request parser.
 211          //-----------------------------------------------------------------------------
 212          BOOL DR_GetDescriptor( void )
 213          {
 214   1         return( TRUE );
 215   1      }
 216          
 217          BOOL DR_SetConfiguration( void )   
 218          { // Called when a Set Configuration command is received
 219   1        
 220   1        if( EZUSB_HIGHSPEED( ) )
 221   1        { // ...FX2 in high speed mode
 222   2          SYNCDELAY;                  // 
 223   2          EP6AUTOINLENH = 0x02;       // set core AUTO commit len = 512 bytes
 224   2          SYNCDELAY;                  // 
 225   2          EP6AUTOINLENL = 0x00;
 226   2          SYNCDELAY;                  // 
 227   2        }
 228   1        else
 229   1        { // ...FX2 in full speed mode
 230   2          SYNCDELAY;                  // 
 231   2          EP6AUTOINLENH = 0x00;       // set core AUTO commit len = 64 bytes
 232   2          SYNCDELAY;                  // 
 233   2          EP6AUTOINLENL = 0x40;
 234   2          SYNCDELAY;                  // 
 235   2        }
 236   1            
 237   1        Configuration = SETUPDAT[ 2 ];
 238   1        return( TRUE );        // Handled by user code
 239   1      }
 240          
C51 COMPILER V7.50   MYPCIOIN                                                              05/27/2006 12:40:15 PAGE 5   

 241          BOOL DR_GetConfiguration( void )   
 242          { // Called when a Get Configuration command is received
 243   1         EP0BUF[ 0 ] = Configuration;
 244   1         EP0BCH = 0;
 245   1         EP0BCL = 1;
 246   1         return(TRUE);          // Handled by user code
 247   1      }
 248          
 249          BOOL DR_SetInterface( void )       
 250          { // Called when a Set Interface command is received
 251   1         AlternateSetting = SETUPDAT[ 2 ];
 252   1         return( TRUE );        // Handled by user code
 253   1      }
 254          
 255          BOOL DR_GetInterface( void )       
 256          { // Called when a Set Interface command is received
 257   1         EP0BUF[ 0 ] = AlternateSetting;
 258   1         EP0BCH = 0;
 259   1         EP0BCL = 1;
 260   1         return( TRUE );        // Handled by user code
 261   1      }
 262          
 263          BOOL DR_GetStatus( void )
 264          {
 265   1         return( TRUE );
 266   1      }
 267          
 268          BOOL DR_ClearFeature( void )
 269          {
 270   1         return( TRUE );
 271   1      }
 272          
 273          BOOL DR_SetFeature( void )
 274          {
 275   1         return( TRUE );
 276   1      }
 277          
 278          #define VX_B2 0xB2              // turn ON debug LEDs...
 279          #define VX_B3 0xB3              // turn OFF debug LEDs...
 280          
 281          #define VX_B7 0xB7              // re-initialize, call TD_Init( );
 282          #define VX_B8 0xB8              // do a "soft reset", vector to org 00h
 283          #define VX_BA 0xBA              // commit out pkt. new way
 284          #define VX_BB 0xBB              // commit in pkt. new way
 285          #define VX_C2 0xC2              // source out pkt.
 286          
 287          
 288          #define VX_BC 0xBC              // turn OFF debug LEDs...
 289          #define VX_BD 0xBD              // turn OFF debug LEDs...
 290          #define VX_BE 0xBE              // turn OFF debug LEDs...
 291          #define VX_BF 0xBF              // turn OFF debug LEDs...

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