smi.cpp

Sm501 VGA芯片wince下驱动代码

GPE *GetGPE()
{
    if (!pGPE)
	{
	    if (!EnableAllSMICards())
			return NULL;
	    pGPE = pSMI[0];

	}

#ifdef ENABLE_DIRECT3D
        ppdev = (SMI*) pGPE;  
#endif // ENABLE_DIRECT3D

	return	pGPE;    
}

//
// GetGPE
//
// Main entry point for a MULTIMON GPE-compliant driver
//
GPE *GetGPEPerCard(int iCard)
{
    if (!pGPE)
    {
		if (!EnableAllSMICards())
		    return NULL;
		pGPE = pSMI[0];
    }

#ifdef ENABLE_DIRECT3D
        ppdev = (SMI*) pSMI[iCard];  
#endif // ENABLE_DIRECT3D
    
    return pSMI[iCard];
}

EGPEFormat eFormat[] =
{
	gpe8Bpp,
	gpe16Bpp,
	gpe24Bpp,
	gpe32Bpp,
};

#ifdef DD_ENABLE
EDDGPEPixelFormat ePixelFormat[4] = 
{
	ddgpePixelFormat_8bpp,
	ddgpePixelFormat_565,
	ddgpePixelFormat_8880,
	ddgpePixelFormat_8888,
};
#endif // DD_ENABLE

ULONG BitMasks[][3] =
{
	{ 0, 0, 0 },
	{ 0xF800, 0x07E0, 0x001F },
	{ 0xFF0000, 0x00FF00, 0x0000FF },
	{ 0x00FF0000, 0x0000FF00, 0x000000FF }
};

// 
// DrvGetMasks
//
// Returns the bitmasks of the primary monitor
//
PULONG APIENTRY DrvGetMasks(DHPDEV dhpdev)
{
	if (pGPE == NULL)
		return(BitMasks[0]);

	int nBPP = ((SMI *)pGPE)->GetBpp()/8 - 1;
	switch (((SMI *)pGPE)->GetBpp())
	{
		case 8:
		case 16:
		case 24:
		case 32:
			return(BitMasks[nBPP]);
			break;
	}

	return(BitMasks[0]);
}

//
// GetBpp
//
// Return the Bpp of the current monitor
//
int SMI::GetBpp(void)
{
	return m_nScreenBpp;
}

// InitCard
//
// Initialize the card to the default mode
//
void SMI::InitCard(void)
{
	//unsigned long gate, clock;
	//unsigned long value;

	// Setup hardware pointer
	m_pLAW = m_SMISettings.m_pLAW;
	m_nLAWPhysical = m_SMISettings.m_nLAWPhysical;
	m_pREG = g_pREG = m_SMISettings.m_pREG;
	m_nREGPhysical = m_SMISettings.m_nREGPhysical;

	m_pDPR = m_pREG + DE_SOURCE;
    m_pMMIO = m_pREG + DE_DATAPORT;
#ifdef CMDLIST
    m_cmdlist_address=m_SMISettings.m_cmdlist_address;
    m_cmdlist_size=m_SMISettings.m_cmdlist_size;
#endif // CMDLIST
    m_sdrambase=m_SMISettings.m_sdrambase;
#ifdef VGXDMA
    m_VGXDMA_address=m_SMISettings.m_VGXDMA_address;
    m_VGXDMA_size=m_SMISettings.m_VGXDMA_size;
#endif // VGXDMA
    
    if (g_CrystalFreqency==12)
    {
        pokeRegisterDWord(MISC_CTRL, 
            FIELD_SET(peekRegisterDWord(MISC_CTRL),
            MISC_CTRL,
            CRYSTAL,
            12));
    }


}

ULONG g_nPanelSize[][2] =
{
	{640,480},
	{800,600},
	{1024,768},
	{800,480},
};
#define MAX_PANELID		(sizeof(g_nPanelSize)/(2*sizeof(ULONG)))

//
// GetPanelID
// 
// Returns the Panel ID as indicated by dipswitch settings, 
// according to the table g_nPanelSize
//
BYTE SMI::GetPanelID(void)
{
	return 1; 
}

// AdjustDefaultMode
// 
// Adjust the Windows CE Registry, as stored by m_SMISettings
//
void SMI::AdjustDefaultMode(void)
{
	if ((m_SMISettings.m_dwCxPanel == 0) || (m_SMISettings.m_dwCyPanel == 0))
	{
		// Read board dipswitch
		BYTE nID = GetPanelID();
		if (nID < MAX_PANELID)
		{
			m_SMISettings.m_dwCxPanel = g_nPanelSize[nID][0];
			m_SMISettings.m_dwCyPanel = g_nPanelSize[nID][1];
		}
		else
		{
			m_SMISettings.m_dwCxPanel = g_nPanelSize[0][0];
			m_SMISettings.m_dwCyPanel = g_nPanelSize[0][1];
		}
	}

	// CxScreen smaller than CxPanel, assumed auto-zoom
	if (m_SMISettings.m_dwCxScreen == 0)
		m_SMISettings.m_dwCxScreen = m_SMISettings.m_dwCxPanel;

	if (m_SMISettings.m_dwCxScreen < m_SMISettings.m_dwCxPanel)
	{
		if (m_SMISettings.m_dwCxZoom ==0)
			m_SMISettings.m_dwCxZoom = m_SMISettings.m_dwCxScreen;
	}

	// CyScreen smaller than CyPanel, assumed auto-zoom
	if (m_SMISettings.m_dwCyScreen == 0)
		m_SMISettings.m_dwCyScreen = m_SMISettings.m_dwCyPanel;
	if (m_SMISettings.m_dwCyScreen <  m_SMISettings.m_dwCyPanel)
	{
		if (m_SMISettings.m_dwCyZoom ==0)
			m_SMISettings.m_dwCyZoom = m_SMISettings.m_dwCyScreen;
	}

	// Adjust CxZoom & CyZoom
	if (m_SMISettings.m_dwCxZoom ==0) m_SMISettings.m_dwCxZoom = m_SMISettings.m_dwCxPanel;
	if (m_SMISettings.m_dwCyZoom ==0) m_SMISettings.m_dwCyZoom = m_SMISettings.m_dwCyPanel;
	if (m_SMISettings.m_dwCxZoom > m_SMISettings.m_dwCxScreen)
		m_SMISettings.m_dwCxZoom = m_SMISettings.m_dwCxScreen;
	if (m_SMISettings.m_dwCyZoom > m_SMISettings.m_dwCyScreen)
		m_SMISettings.m_dwCyZoom = m_SMISettings.m_dwCyScreen;


	// Adjust Bpp
	if (m_SMISettings.m_dwBpp == 0) m_SMISettings.m_dwBpp = SSBPP_DEFAULT;

	// Adjust Frequency
	if (m_SMISettings.m_nFrequency == 0) m_SMISettings.m_nFrequency = SSFREQ_DEFAULT;

	// Need to adjust ModeId in the future
	m_SMISettings.m_nModeId = 0; 
}



// Init
// 
// First and main initialization routine of the SMI class 
// (Should not be done by SMI constructor, due to future inheritance issues)
//
// Inputs:		pss		= Hardware info & Windows CE Registry Settings 
//
void SMI::Init(SMISETTINGS *pss)
{
	// Adjust all SMI Settings to make sure that we have valid values
	m_SMISettings = *pss;

	// Init internal flags
	m_bAlphaEnabled = FALSE;
	m_bZoomEnabled = FALSE;
	m_bPWMEnabled = FALSE;
	m_bI2CEnabled = FALSE;
	m_bGPIOEnabled = FALSE;
#ifndef DISABLE_INTERRUPT_MANAGEMENT
	m_bIntInitDone = FALSE;
#endif

	// Init Power Management
	InitPowerManagement();

	// Initialize card
	InitCard();

	AdjustDefaultMode();

 	m_bSetMode = FALSE;
	m_pPrimarySurface = NULL;

#ifdef DD_ENABLE
	m_pVideoMemoryHeap = NULL;

	m_pModeEx = &m_ModeInfoEx;
	m_pMode = &m_ModeInfoEx.modeInfo;
	memset(m_pModeEx, 0, sizeof(GPEModeEx));
	m_pModeEx->dwSize = sizeof(GPEModeEx);
	m_pModeEx->dwVersion = GPEMODEEX_CURRENTVERSION;
#else
	m_p2DVideoMemory = NULL;

	m_pMode = &m_ModeInfo;
#endif

	// Setup main ModeInfo
	m_pMode->modeId = m_SMISettings.m_nModeId; 
	m_pMode->Bpp = m_SMISettings.m_dwBpp;
	m_pMode->frequency = m_SMISettings.m_nFrequency;
	m_pMode->width = m_SMISettings.m_dwCxScreen;
	m_pMode->height = m_SMISettings.m_dwCyScreen;

	int nBPP = m_pMode->Bpp/8 - 1;
	switch (m_pMode->Bpp)
	{
		case	8:
		case	16:
		case	32:
			m_pMode->format = eFormat[nBPP];
#ifdef DD_ENABLE
			m_pModeEx->ePixelFormat = ePixelFormat[nBPP];
			m_pModeEx->lPitch = m_pMode->width * m_SMISettings.m_dwBpp / 8;
			m_pModeEx->dwRBitMask = BitMasks[nBPP][0];
			m_pModeEx->dwGBitMask = BitMasks[nBPP][1];
			m_pModeEx->dwBBitMask = BitMasks[nBPP][2];
#endif
			break;

		default:
			RETAILMSG(1,(TEXT("SMIVGX - Invalid BPP value passed to driver - Bpp = %d\r\n"), m_pMode->Bpp));
			m_pMode->format = gpeUndefined;
			break;
	}

	// Check Video Memory Size
	SetupVideoMemory();
	
	// Set-up Cursor Memory
	SetupCursor();

	// Allocate buffer to save panel cursor memory
	m_pPanelHwcBuffer = (PUCHAR) VirtualAlloc(NULL, 2048, MEM_COMMIT, PAGE_READWRITE);
	if (m_pPanelHwcBuffer == NULL)
    {
		RETAILMSG(1, (TEXT("System memory allocation for panel cursor failed!\r\n")));
    }

#ifdef CMDLIST
	// Set-up Command List Buffer
	SetupCmdListBuffer();
#endif // CMDLIST

#ifdef VGXDMA
	// Init VGX DMA
	InitVGXDMA();
#endif

	// Setup Rotation Info
    m_nScreenHeightSave = m_pMode->height;
    m_nScreenWidthSave = m_pMode->width;
    m_nScreenBpp = m_pMode->Bpp;    //m_nScreenBpp is used in StartPowerManagement()
	m_iRotate = GetRotateModeFromReg();
	SetRotateParams();

	// Start Power Management
	StartPowerManagement();

	// Setup interrupt event
#ifndef DISABLE_INTERRUPT_MANAGEMENT
	InitInterrupt();
#endif
	InitVSyncInterrupt();

	// Init SSP API
	InitSSP();

    //add backlight function-- mill.chen
	BackLightEnable(m_SMISettings.m_BacklightEnable);

}

#define BLOCK_64K (64*1024)
void SMI::SetupVideoMemory()
{
#ifndef UMA
	// Configure memory state
	ULONG value = peekRegisterDWord(DRAM_CTRL);
	if (rev() == 0xA0) 	// Configure the memory for revA
	{
		//value = FIELD_SET(value, DRAM_CTRL, SIZE, 16);
		//value = FIELD_SET(value, DRAM_CTRL, COLUMN_SIZE, 512);
		value = FIELD_SET(value, DRAM_CTRL, BLOCK_WRITE_PRECHARGE, 4);
		value = FIELD_SET(value, DRAM_CTRL, BANKS, 2);
		//value = 0x000025C2;
	}
	else if (rev() == 0xB0)// revB
	{
		value = FIELD_SET(value, DRAM_CTRL, BANKS, 2);
		//value = 0x07F127C0; 
	}

#if 1
	 value = FIELD_SET(value, DRAM_CTRL_CPU, COLUMN_SIZE, 512);
	 DWORD m_size = (m_nVideoMemorySize + USB_MEMORY_HOST) >> 20;
	 switch (m_size)
	 {
		case 8:
			 value = FIELD_SET(value, DRAM_CTRL, CPU_SIZE, 8);
			 value = FIELD_SET(value, DRAM_CTRL, SIZE, 8);
			 break;
		case 16:
			 value = FIELD_SET(value, DRAM_CTRL, CPU_SIZE, 16);
			 value = FIELD_SET(value, DRAM_CTRL, SIZE, 16);
			 break;
		case 32:
			 value = FIELD_SET(value, DRAM_CTRL, CPU_SIZE, 32);
			 value = FIELD_SET(value, DRAM_CTRL, SIZE, 32);
			 break;
		case 64:
			 value = FIELD_SET(value, DRAM_CTRL, CPU_SIZE, 64);
			 value = FIELD_SET(value, DRAM_CTRL, SIZE, 64);
			 break;

	 }
#endif

	pokeRegisterDWord(DRAM_CTRL, value);

	// Check memory size
	m_nVideoMemorySize = m_SMISettings.MaxVideoMemorySize();

	// Initialize memory block
	for (ULONG offset =  m_nVideoMemorySize; offset != 0; offset -= BLOCK_64K)
	{
		if (offset == (0x16 << 20) -BLOCK_64K)
			offset = offset;

		if (offset == (0x15 << 20) -BLOCK_64K)
			offset = offset;
		if (offset == (0x14 << 20) -BLOCK_64K)
			offset = offset;
		if (offset == (0x13 << 20) -BLOCK_64K)
			offset = offset;
		if (offset == (0x10 << 20) -BLOCK_64K)
			offset = offset;
		if (offset == (0x8 << 20) -BLOCK_64K)
			offset = offset;
		if (offset == (0x4 << 20) -BLOCK_64K)
			offset = offset;

		*(PULONG) (m_pLAW + offset - 4) = offset ^ 0xAA551133;
	}

	// Now, find the last 64kB block with a correct identifier and we have
	// found the size of the video memory.
	for (offset = m_nVideoMemorySize; offset != 0; offset -= BLOCK_64K)
	{
		if (*(PULONG) (m_pLAW + offset - 4) == (offset ^ 0xAA551133))
			break;
	}
	// Update the physical size of the video memory.
	m_nVideoMemorySize = offset;
	m_nVideoMemoryAvail = m_nVideoMemorySize;

	// Clear memory
	DEBUGMSG(GPE_ZONE_INIT, (TEXT("SMIVGX - Video Memory Size = %d.\r\n"), m_nVideoMemorySize));
	memset((PUCHAR) m_pLAW, 0, m_nVideoMemorySize);

#else
    ULONG value = peekRegisterDWord(MISC_CTRL);
    POKE_32(MISC_CTRL,  value 									|
            			FIELD_INIT(MISC_CTRL, BURST_LENGTH, 1 )
            			);
        
    value = peekRegisterDWord(DRAM_CTRL);
    value &= 0xFFFF;
    value |= 
            FIELD_INIT(DRAM_CTRL, CPU_BURST, 4 ) |
            FIELD_INIT(DRAM_CTRL, CPU_CAS_LATENCY, 3) |
            FIELD_INIT(DRAM_CTRL, CPU_SIZE, 64) |
            FIELD_INIT(DRAM_CTRL, CPU_COLUMN_SIZE, 512) |
            FIELD_INIT(DRAM_CTRL, CPU_ACTIVE_PRECHARGE, 7) |
            FIELD_INIT(DRAM_CTRL, CPU_RESET, DISABLE) |
            FIELD_INIT(DRAM_CTRL, CPU_BANKS, 4);