hzk.cmd

电力系统中的保护装置全部代码

/***************************************************************************************/
/*									               */
/*    Usage:	   lnk30 <obj files...>  -o <out file> -m <map file> c.cmd             */
/*									               */
/*    Description: This file is a sample command file that can be used	               */
/*		   for linking programs built with the TMS320C30 C	               */
/*		   Compiler.   Use it a guideline; you may want to change              */
/*		   the allocation scheme according to the size of your	               */
/*		   program and the memory layout of your target system.                */
/*									               */
/*    Notes: (1)   You must specify the directory in which rts.lib is	               */
/*		   located.  Either add a "-i<directory>" line to this	               */
/*		   file, or use the system environment variable C_DIR to               */
/*		   specify a search path for libraries. 		               */
/*									               */
/*	     (2)   When using the small (default) memory model, be sure                */
/*		   that the ENTIRE .bss section fits within a single page.             */
/*		   To satisfy this, .bss must be smaller than 64K words and            */
/*		   must not cross any 64K boundaries.			               */
/***************************************************************************************/


 /*
-c 


-m demo.map
-o yjdspos.out

*/
/*-stack 0x180       */
/* SPECIFY THE SYSTEM MEMORY MAP FOR TI 'C30 EVM */

MEMORY
{  
   ROMRESET(RWIX):  org = 0x00000000  len = 0x00000001   /* RESET VECTOR 	        */
   ROMVECT(RWIX):   org = 0x00000001  len = 0x0000003F   /* INTERRUPT AND TRAP VECTORS  */
   FLASHROM(RWIX):  org = 0x00000040  len = 0x0000FFBF   /* FLASH MEMORY                */
   FLASHSET:        org = 0x00018000  len = 0x00001000   /* FLASH MEMORY                */
   DSRAM:           org = 0x00810000  len = 0x00007FFF   /* DS1644 MEMORY               */
   RAM0:            org = 0x0087fe00  len = 0x00000100   /* RAM BLOCK 0                 */    
   RAM1:            org = 0x0087ff00  len = 0x00000100   /* RAM BLOCK 1                 */    
   RAMRESET:        org = 0x00900000  len = 0x00000001   /* VECTORS IN SRAM             */
   RAMVECT:         org = 0x00900001  len = 0x0000003F   /* VECTORS IN SRAM             */
   SRAM1:           org = 0x00900040  len = 0x0000FFBF   /* SRAM MEMORY                 */
   SRAM2:           org = 0x00910000  len = 0x00002FFF   /* SRAM MEMORY                 */
   SRAM3:           org = 0x00913000  len = 0x0000CFFF   /* SRAM MEMORY                 */
 }

/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY                                          */

SECTIONS
{
                                                        
   .intreset 	   {} > RAMRESET                                                       
/* .intreset:      load=RAMRESET,run=ROMRESET    */      /* PROGRAM RESET ZONE          */ 
   .intvecs        {} > RAMVECT                                                            
/* .intvecs:       load=RAMVECT,run=ROMVECT      */      /* INTERRUPT VECT TABLE        */
   .setting_data:  {} > FLASHSET                         /* SETTING ZONE                */ 
   .yxbw_data:     {} > DSRAM                            /* REMOTE SIGNAL REPORT ZONE   */
   .zdbw_data:     {} > DSRAM                            /* DIAGNOSIS REPORT ZONE       */
   .sjbw_data:     {} > DSRAM                            /* EVENT REPORT ZONE           */    
   .clbw_data:     {} > DSRAM                            /* MEASUREMENT REPORT ZONE     */
   .SettingData:   {} > DSRAM                            /* SETTING ZONE                */
   .text:          {} > SRAM1                                                        
/* .text:          load=SRAM1,run=FLASHROM        */     /* PROGRAM ZONE                */
   .cinit:         {} > SRAM1                                                        
/* .cinit:         load=SRAM1,run=FLASHROM        */     /* .cint   ZONE                */   
   .const:         {} > SRAM1                                                         
/* .const:         load=SRAM1,run=FLASHROM        */     /* .const  ZONE                */
   .data:          {} > SRAM1                                                        
/* .data:          load=SRAM1,run=FLASHROM        */     /* .data   ZONE                */ 
   .sample_data:   {} > SRAM2                            /* SAMPLE DATUM ZONE           */
   .time_data:     {} > SRAM2                            /* TIME DATUM ZONE             */
   .timebuf_data:  {} > SRAM2                            /* TIME TEMPORY ZONE           */
   .commu_data:    {} > SRAM2                            /* COMMUNICATION DATUM ZONE    */
   .stack:  	   {} > SRAM3                            /* SYSTEM STACK ZONE           */
   .bss:    	   {} > SRAM3                            /* GLOBAL AND STATIC VARIBLE ZONE*/
   .lau:    	   {} > SRAM3     	
   .c_data:	   {} > SRAM3
   .xref:          {} > SRAM3 
    hisrstk: 	   {} > SRAM3                            /* TIMER HISR STACK ZONE,MUST BE THE LAST ZONE */             
   .FOURIER1_Addr: {} > RAM0  
/* .dest_data      {} > RAM1                                                            */
 

}