📄 base.asm
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.member _pro_channel_number,1120,14,8,32
.member _mmi_flag,1152,14,8,32
.eos
.sym _REPORT,0,8,13,1184,_PROTECT_REPORT
.stag _TIME_STRUCT,192
.member _Year,0,14,8,32
.member _Month,32,14,8,32
.member _Day,64,14,8,32
.member _Hour,96,14,8,32
.member _Minute,128,14,8,32
.member _Millionsecond,160,14,8,32
.eos
.sym _TIME,0,8,13,192,_TIME_STRUCT
.file "chk_defs.h"
.stag _CHECK_STRUCT,352
.member _chk_link_next,0,24,8,32,_CHECK_STRUCT
.member _chk_link_previous,32,24,8,32,_CHECK_STRUCT
.member _chk_id,64,14,8,32
.member _pSOE_name,96,18,8,32
.member _pSOE_back_name,128,18,8,32
.member _SOE_Inf,160,14,8,32
.member _closedown,192,14,8,32
.member _startup_flag,224,14,8,32
.member _pickup_flag,256,14,8,32
.member _delay_time,288,14,8,32
.member _chk_routine_handler,320,144,8,32
.eos
.sym _CHECK,0,8,13,352,_CHECK_STRUCT
.file "chl_defs.h"
.stag _PRO_CHANNEL_STRUCT,2624
.member _chl_Num,0,14,8,32
.member _pchl_device_name,32,18,8,32
.member _chl_device_name,64,50,8,512,,16
.member _pchl_name,576,18,8,32
.member _chl_name,608,50,8,1024,,32
.member _chl_calculate_style,1632,4,8,32
.member _pchl_value_dimension,1664,18,8,32
.member _chl_calculate_coefficient,1696,6,8,32
.member _chl_correlation_channel,1728,2,8,32
.member _pchl_Sample_Address,1760,18,8,32
.member _chla_DC_component,1792,6,8,32
.member _chla_fundamental_real,1824,6,8,32
.member _chla_fundamental_imaginary,1856,6,8,32
.member _chla_2nd_harmonic_real,1888,6,8,32
.member _chla_2nd_harmonic_imaginary,1920,6,8,32
.member _chla_3rd_harmonic_real,1952,6,8,32
.member _chla_3rd_harmonic_imaginary,1984,6,8,32
.member _chla_5th_harmonic_real,2016,6,8,32
.member _chla_5th_harmonic_imaginary,2048,6,8,32
.member _chlb_DC_component,2080,6,8,32
.member _chlb_fundamental_real,2112,6,8,32
.member _chlb_fundamental_imaginary,2144,6,8,32
.member _chlb_2nd_harmonic_real,2176,6,8,32
.member _chlb_2nd_harmonic_imaginary,2208,6,8,32
.member _chlb_3rd_harmonic_real,2240,6,8,32
.member _chlb_3rd_harmonic_imaginary,2272,6,8,32
.member _chlb_5th_harmonic_real,2304,6,8,32
.member _chlb_5th_harmonic_imaginary,2336,6,8,32
.member _chl_value,2368,6,8,32
.member _chl_value1,2400,6,8,32
.member _chl_angle,2432,6,8,32
.member _chl_scale,2464,6,8,32
.member _chl_angle_compensate,2496,6,8,32
.member _chl_angle_compensate_real,2528,6,8,32
.member _chl_angle_compensate_imaginary,2560,6,8,32
.member _chl_empty_flag,2592,14,8,32
.eos
.sym _PRO_CHANNEL,0,8,13,2624,_PRO_CHANNEL_STRUCT
.stag _CHANNEL_STRUCT,2560
.member _words,0,62,8,2560,,80
.eos
.sym _CHANNEL,0,8,13,2560,_CHANNEL_STRUCT
.file "comm.h"
.stag _Buffer_Struct,128
.member _pInBuffer,0,92,8,32
.member _pOutBuffer,32,92,8,32
.member _Buffer,64,28,8,32
.member _Length,96,4,8,32
.eos
.file "BaseVariable.h"
.file "base.c"
.sect ".cinit"
.field 1,32
.field _pReportIN+0,32
.field _ReportRAM,32 ; _pReportIN @ 0
.sect ".text"
.global _pReportIN
.bss _pReportIN,1
.sym _pReportIN,_pReportIN,24,2,32,_PROTECT_REPORT
.sect ".cinit"
.field 1,32
.field _pReportSave+0,32
.field _ReportRAM,32 ; _pReportSave @ 0
.sect ".text"
.global _pReportSave
.bss _pReportSave,1
.sym _pReportSave,_pReportSave,24,2,32,_PROTECT_REPORT
.sect ".cinit"
.field 1,32
.field _pReportDISP+0,32
.field _ReportRAM,32 ; _pReportDISP @ 0
.sect ".text"
.global _pReportDISP
.bss _pReportDISP,1
.sym _pReportDISP,_pReportDISP,24,2,32,_PROTECT_REPORT
.sect ".cinit"
.field 1,32
.field _pReportRVT+0,32
.field _ReportRAM,32 ; _pReportRVT @ 0
.sect ".text"
.global _pReportRVT
.bss _pReportRVT,1
.sym _pReportRVT,_pReportRVT,24,2,32,_PROTECT_REPORT
.sect ".cinit"
.field 1,32
.field _pDIN1PORT+0,32
.field 8454144,32 ; _pDIN1PORT @ 0
.sect ".text"
.global _pDIN1PORT
.bss _pDIN1PORT,1
.sym _pDIN1PORT,_pDIN1PORT,30,2,32
.sect ".cinit"
.field 1,32
.field _pDIN2PORT+0,32
.field 8458240,32 ; _pDIN2PORT @ 0
.sect ".text"
.global _pDIN2PORT
.bss _pDIN2PORT,1
.sym _pDIN2PORT,_pDIN2PORT,30,2,32
.sect ".cinit"
.field 1,32
.field _pLCD1PORT+0,32
.field 8519680,32 ; _pLCD1PORT @ 0
.sect ".text"
.global _pLCD1PORT
.bss _pLCD1PORT,1
.sym _pLCD1PORT,_pLCD1PORT,30,2,32
.sect ".cinit"
.field 1,32
.field _pDOPORT+0,32
.field 8470528,32 ; _pDOPORT @ 0
.sect ".text"
.global _pDOPORT
.bss _pDOPORT,1
.sym _pDOPORT,_pDOPORT,30,2,32
.sect ".cinit"
.field 1,32
.field _pCTRLPORT+0,32
.field 8474624,32 ; _pCTRLPORT @ 0
.sect ".text"
.global _pCTRLPORT
.bss _pCTRLPORT,1
.sym _pCTRLPORT,_pCTRLPORT,30,2,32
.sect ".cinit"
.field 1,32
.field _pKEYPORT+0,32
.field 8466432,32 ; _pKEYPORT @ 0
.sect ".text"
.global _pKEYPORT
.bss _pKEYPORT,1
.sym _pKEYPORT,_pKEYPORT,30,2,32
.sect ".cinit"
.field 1,32
.field _Com_Port1+0,32
.field 8478720,32 ; _Com_Port1 @ 0
.sect ".text"
.global _Com_Port1
.bss _Com_Port1,1
.sym _Com_Port1,_Com_Port1,28,2,32
.sect ".cinit"
.field 1,32
.field _Com_Port2+0,32
.field 8482816,32 ; _Com_Port2 @ 0
.sect ".text"
.global _Com_Port2
.bss _Com_Port2,1
.sym _Com_Port2,_Com_Port2,28,2,32
.sect ".cinit"
.field 1,32
.field _Com_Port3+0,32
.field 8486912,32 ; _Com_Port3 @ 0
.sect ".text"
.global _Com_Port3
.bss _Com_Port3,1
.sym _Com_Port3,_Com_Port3,28,2,32
.sect ".cinit"
.field 1,32
.field _Com_Port4+0,32
.field 8491008,32 ; _Com_Port4 @ 0
.sect ".text"
.global _Com_Port4
.bss _Com_Port4,1
.sym _Com_Port4,_Com_Port4,28,2,32
.sect ".cinit"
.field 1,32
.field _pADPORT+0,32
.field 8495104,32 ; _pADPORT @ 0
.sect ".text"
.global _pADPORT
.bss _pADPORT,1
.sym _pADPORT,_pADPORT,30,2,32
.sect ".cinit"
.field 1,32
.field _pDIN3PORT+0,32
.field 8462336,32 ; _pDIN3PORT @ 0
.sect ".text"
.global _pDIN3PORT
.bss _pDIN3PORT,1
.sym _pDIN3PORT,_pDIN3PORT,30,2,32
.sect ".text"
.global _Base_Varible_Initialize
.sym _Base_Varible_Initialize,_Base_Varible_Initialize,32,2,0
.func 73
;******************************************************************************
;* FUNCTION NAME: _Base_Varible_Initialize *
;* *
;* Architecture : TMS320C32 *
;* Calling Convention : Stack Parameter Convention *
;* Function Uses Regs : r0,r1,f2,r2,r3,r4,ar0,ar1,ar2,fp,ar4,bk,sp,st,rs,re,*
;* rc,pc *
;* Regs Saved : r4,ar4 *
;* Stack Frame : Full (w/ debug) *
;* Total Frame Size : 2 Call + 0 Parm + 17 Auto + 2 SOE = 21 words *
;******************************************************************************
_Base_Varible_Initialize:
.sym _l,1,14,1,32
.sym _ByteData,2,62,1,512,,16
;* r4 assigned to _i
.sym _i,4,14,4,32
;* rc assigned to _j
.sym _j,19,14,4,32
;* r0 assigned to _k
.sym _k,0,14,4,32
;* ar0 assigned to _pByte
.sym _pByte,8,30,4,32
;* ar1 assigned to _pWord
.sym _pWord,9,30,4,32
;* ar4 assigned to _protect
.sym _protect,12,24,4,32,_PROTECT_STRUCT
;* r1 assigned to _pSets
.sym _pSets,1,24,4,32,_SETTING_STRUCT
;* ar0 assigned to _pEEP1
.sym _pEEP1,8,24,4,32,_EEP_REPORT_STRUCT
;* ar0 assigned to _pDI
.sym _pDI,8,24,4,32,_DIFUN
;* ar4 assigned to _check
.sym _check,12,24,4,32,_CHECK_STRUCT
.line 1
;----------------------------------------------------------------------
; 73 | VOID Base_Varible_Initialize(VOID)
; 75 | UNSIGNED l,ByteData[4*PULSENUM];
; 76 | register UNSIGNED i,j,k,*pByte,*pWord;
; 77 | register PROTECT *protect;
; 78 | register SETTING *pSets;
; 79 | register EEP_REPORT *pEEP1;
;----------------------------------------------------------------------
push fp
ldiu sp,fp
addi 17,sp
push r4
push ar4
.line 8
;----------------------------------------------------------------------
; 80 | register DISTRU *pDI = DIChn;
; 81 | register CHECK *check;
;----------------------------------------------------------------------
ldp @CL1,DP
ldiu @CL1,ar0 ; |80|
.line 11
;----------------------------------------------------------------------
; 83 | Switchin_buf = (*pDIN1PORT & 0xFFFF) | ((*pDIN2PORT & 0xFFFF) << 16);
; | //开入稳态值初始化
;----------------------------------------------------------------------
ldp @CL3,DP
ldiu @CL3,ar2 ; |83|
ldp @CL4,DP
ldiu @CL4,ar1 ; |83|
ldiu *ar1,ar1 ; |83|
ldiu *ar2,ar4 ; |83|
ldp @CL2,DP
ldiu *ar1,r1 ; |83|
|| ldiu *ar4,r0 ; |83|
and 65535,r0 ; |83|
ldiu @CL2,ar2 ; |83|
and 65535,r1 ; |83|
ash 16,r0 ; |83|
or3 r1,r0,r0 ; |83|
sti r0,*ar2 ; |83|
.line 12
;----------------------------------------------------------------------
; 84 | SoftTime.DI[0] = Switchin_buf;
; | //开入暂态值初始化
;----------------------------------------------------------------------
ldiu @CL2,ar1 ; |84|
ldp @CL5,DP
ldiu @CL5,ar2 ; |84|
ldiu *ar1,r0 ; |84|
sti r0,*ar2 ; |84|
.line 13
;----------------------------------------------------------------------
; 85 | for (i = 0, j = 1; i < DI_Number; i++, j <<= 1)
; | //开入结构体状态位初始化
;----------------------------------------------------------------------
ldiu 0,r4 ; |85|
ldiu 1,rc ; |85|
cmpi 32,r4 ; |85|
bhs L5 ; |85|
;* Branch Occurs to L5 ; |85|
L2:
.line 15
;----------------------------------------------------------------------
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