ioreadnet.c

主要进行大规模的电路综合

/**CFile****************************************************************

  FileName    [ioReadNet.c]

  PackageName [MVSIS 2.0: Multi-valued logic synthesis system.]

  Synopsis    [Creates the network structure from the node fanin/fanout information.]

  Author      [MVSIS Group]
  
  Affiliation [UC Berkeley]

  Date        [Ver. 1.0. Started - February 1, 2003.]

  Revision    [$Id: ioReadNet.c,v 1.23 2003/05/27 23:14:14 alanmi Exp $]

***********************************************************************/

#include "ioInt.h"

////////////////////////////////////////////////////////////////////////
///                        DECLARATIONS                              ///
////////////////////////////////////////////////////////////////////////

static int  Io_ReadNetworkName( Io_Read_t * p, Ntk_Network_t * pNet );
static int  Io_ReadNetworkSpec( Io_Read_t * p, Ntk_Network_t * pNet );
static int  Io_ReadNetworkCis( Io_Read_t * p, int Line, Ntk_Network_t * pNet );
static void Io_ReadNetworkCiSetValue( Io_Read_t * p, Ntk_Node_t * pNode );
static int  Io_ReadNetworkInternalNode( Io_Read_t * p, int Node, Ntk_Network_t * pNet );
static int  Io_ReadNetworkLatchInputOutput( Io_Read_t * p, int Latch, Ntk_Network_t * pNet );
static int  Io_ReadNetworkInternalNodeMvs( Io_Read_t * p, Ntk_Node_t * pNode );
static int  Io_ReadNetworkCos( Io_Read_t * p, int Line, Ntk_Network_t * pNet );
static int  Io_ReadNetworkLatch( Io_Read_t * p, int Latch, Ntk_Network_t * pNet );

////////////////////////////////////////////////////////////////////////
///                     FUNCTION DEFITIONS                           ///
////////////////////////////////////////////////////////////////////////

/**Function*************************************************************

  Synopsis    [Compiles the network from information derived by preparsing.]

  Description [This procedure compiles the network from the information
  collected from the BLIF/BLIF-MVS/BLIF-MV file during preparsing.
  The information is available in the Io_Read_t structure and includes:
  (1) The network type (BLIF, BLIF-MVS, BLIF-MV)
  (2) The 0-terminated lines for all dot-statements of the input file.
  (3) The array of Io_Node_t structures containing, for each node: 
      (a) The 0-terminated .names line. 
      (b) The first table line and the number of table lines. 
      (c) The name of the output.
      (d) The number of values of this node (for BLIF-MV).
      (e) The default value of this node (for BLIF-MV).
  (4) The array of latches.

  This procedure performs the following steps:
  (0) Allocates the network and assigns its name.
  (1) Adds CI nodes (PI nodes and latch outputs) as CI nodes.
  (2) Adds CO nodes (PO nodes and latch inputs) as internal nodes.
      During this step, we mark which CO nodes belong to latches only.
  (3) Goes through all the nodes in the file that have .names/.table
      directive (these nodes are the internal nodes and CO nodes)
      and adds then to the network as internal nodes
  (4) Connects the internal nodes using fanin/fanout pins
  (5) At this point, the network has correct connectivity, except for 
      the fact that the POs are represented as internal nodes
      and the pure CO nodes are missing. Network check is performed.
  (6) Derives the functionality of each internal node from file.
  (7) Adds pure CO nodes for each CO node and the latch input.
      As a result of this step, those internal nodes that represented
      the CO nodes become the internal nodes, which fanout into pure POs,
      which has CO names. The internal nodes lose their names to 
      the pure CO nodes and from now on, have no names.
  (8) Finally, the latches are added as CO/CI pairs corresponding
      to the latch input/output pairs.]
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
Ntk_Network_t * Io_ReadNetworkStructure( Io_Read_t * p )
{
    Ntk_Network_t * pNet;
    Ntk_Node_t * pNode;
    Ntk_Latch_t * pLatch;
    int i;

    // (0) allocate the empty network
    pNet = Ntk_NetworkAlloc( p->pMvsis );
    // read the network name
    if ( !p->fParsingExdcNet ) // EXDC network has no name
    {
        if ( Io_ReadNetworkName( p, pNet ) )
            goto failure;
        if ( Io_ReadNetworkSpec( p, pNet ) )
            goto failure;
    }

    // (1) create the primary inputs as PI nodes
    for ( i = 0; i < p->nDotInputs; i++ )
        if ( Io_ReadNetworkCis( p, i, pNet ) )
            goto failure;
    // (2) create the primary outputs as internal nodes
    for ( i = 0; i < p->nDotOutputs; i++ )
        if ( Io_ReadNetworkCos( p, i, pNet )  )
            goto failure;
    // (1) create latch outputs as PI nodes
    // (2) create latch inputs as internal nodes
    for ( i = 0; i < p->nDotLatches; i++ )
        if ( Io_ReadNetworkLatchInputOutput( p, i, pNet ) )
            goto failure;

    // (3) create the node structures of the internal nodes
    for ( i = 0; i < p->nDotNodes; i++ )
        if ( Io_ReadNetworkInternalNode( p, i, pNet )  )
            goto failure;

    // set the number of values for the PI variables
    // (all other variables have been set by Io_ReadNetworkInternalNode)
    Ntk_NetworkForEachCi( pNet, pNode )
        Io_ReadNetworkCiSetValue( p, pNode );
    // allocate temporary storage
    Io_ReadStructAllocateAdditional( p );

    // (4) create the fanout structures for the fanin nodes of the internal nodes
    Ntk_NetworkForEachNode( pNet, pNode )
    {   // make sure all the internal nodes have Io_Node_t structures
        // which will be used below to create their functionality
        if ( Ntk_NodeReadData(pNode) == NULL )
        {
            p->LineCur = p->LineModel;
            sprintf( p->sError, "Node \"%s\" is not driven; binary constant 0 is assumed.", Ntk_NodeReadName(pNode) );
            Io_ReadPrintErrorMessage( p );
//            goto failure;
            Ntk_NodeSetValueNum( pNode, 2 );
        }
    }
    Ntk_NetworkForEachNode( pNet, pNode )
    {
        // add the fanout structures to the fanins of the node
        Ntk_NodeAddFaninFanout( pNet, pNode );
        // create the variable map of the node
        Ntk_NodeAssignVm( pNode );
    }
/*   
    // (5) make sure that everything is okay with the network structure
    // makes no sense to run Ntk_NetworkAcyclic() here because there are no COs yet...
    if ( !Ntk_NetworkCheck( pNet ) )
    {
        p->LineCur = 0;
        sprintf( p->sError, "Network check has failed." );
        Io_ReadPrintErrorMessage( p );
        goto failure;
    } 
*/
    // (6) derive functionality for the internal nodes (MVR and/or MVSOP)
    Ntk_NetworkForEachNode( pNet, pNode )
        if ( Io_ReadNodeFunctions( p, pNode ) )
            goto failure;

    // (8) create latch reset tables and add the latches
    for ( i = 0; i < p->nDotLatches; i++ )
        if ( Io_ReadNetworkLatch( p, i, pNet ) )
            goto failure;

    // (7) introduce the pure PO nodes and connect them to the internal nodes
    for ( i = 0; i < array_n(p->aOutputs); i++ )
    {
        pNode = array_fetch( Ntk_Node_t *, p->aOutputs, i );
        if ( Ntk_NodeIsCi(pNode) )
        {
            fprintf( Ntk_NodeReadMvsisOut(pNode), "Warning: input and output named \"%s\": ", Ntk_NodeReadName(pNode) );
            Ntk_NetworkTransformCiToCo( pNet, pNode );
            fprintf( Ntk_NodeReadMvsisOut(pNode), "renaming input \"%s\".\n", Ntk_NodeReadName(pNode) );
            continue;
        }
        assert( Ntk_NodeIsInternal(pNode) );
        if ( Ntk_NodeIsBinaryBuffer(pNode) && Ntk_NodeReadFanoutNum(pNode) == 0 )
            Ntk_NetworkTransformNodeIntToCo( pNet, pNode );
        else
            Ntk_NetworkAddNodeCo( pNet, pNode, 1 );
    }

    // adjust latch input nodes 
    // they could change after the label COs are added
    Ntk_NetworkForEachLatch( pNet, pLatch )
        Ntk_LatchAdjustInput( pNet, pLatch );

    // (9) change the fanin order
    Ntk_NetworkOrderFanins( pNet );

    // use the default whenever possible
    Ntk_NetworkForceDefault( pNet );
    
    // if the spec is not given, set the current network as its own spec
    if ( Ntk_NetworkReadSpec(pNet) == NULL )//&& p->Type == IO_FILE_BLIF_MV )
        Ntk_NetworkSetSpec( pNet, Ntk_NetworkRegisterNewName(pNet, p->FileName) );

    // (10) make sure that everything is okay with the network structure
    if ( !Ntk_NetworkCheck( pNet ) )
    {
        p->LineCur = 0;
        sprintf( p->sError, "The second network check has failed." );
        Io_ReadPrintErrorMessage( p );
        goto failure;
    }
    return pNet;

failure:
    Ntk_NetworkDelete( pNet );
    return NULL;
}

/**Function*************************************************************

  Synopsis    []

  Description []

  SideEffects []

  SeeAlso     []

***********************************************************************/
int Io_ReadNetworkName( Io_Read_t * p, Ntk_Network_t * pNet )
{
    char * pName, * pTemp;
    assert( strncmp( p->pLines[p->LineModel], ".model", 6 ) == 0 );
    // skip the ".model" word and get the network name
    pTemp = strtok( p->pLines[p->LineModel] + 7, " \t" );
    // register the name
    pName = Ntk_NetworkRegisterNewName( pNet, pTemp );
    // assign the name
    Ntk_NetworkSetName( pNet, pName );
    // get the next token
    pTemp = strtok( NULL, " \t" );
    if ( pTemp != NULL )
    {
        p->LineCur = p->LineModel;
        sprintf( p->sError, "Trailing symbols on .model line (%s).", pTemp );
        Io_ReadPrintErrorMessage( p );
        return 1;
    }
    return 0;
}

/**Function*************************************************************

  Synopsis    []

  Description []

  SideEffects []

  SeeAlso     []

***********************************************************************/
int Io_ReadNetworkSpec( Io_Read_t * p, Ntk_Network_t * pNet )
{
    char * pName, * pTemp;
    // check if there is a spec line
    if ( p->LineSpec < 0 )
        return 0;
    assert( strncmp( p->pLines[p->LineSpec], ".spec", 5 ) == 0 );
    // skip the ".spec" word and get the network name
    pTemp = strtok( p->pLines[p->LineSpec] + 6, " \t" );
    // register the name
    pName = Ntk_NetworkRegisterNewName( pNet, pTemp );
    // assign the name
    Ntk_NetworkSetSpec( pNet, pName );
    // get the next token
    pTemp = strtok( NULL, " \t" );
    if ( pTemp != NULL )
    {
        p->LineCur = p->LineSpec;
        sprintf( p->sError, "Trailing symbols on .spec line (%s).", pTemp );
        Io_ReadPrintErrorMessage( p );
        return 1;
    }
    return 0;
}

/**Function*************************************************************

  Synopsis    [Reads the list of primary inputs.]

  Description []
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
int Io_ReadNetworkCis( Io_Read_t * p, int Line, Ntk_Network_t * pNet )
{
    char * pTemp;
    // make sure this is indeed the .inputs line
    assert( strncmp( p->pLines[p->pDotInputs[Line]], ".inputs", 7 ) == 0 );
    // skip the ".inputs" word
    pTemp = strtok( p->pLines[p->pDotInputs[Line]], " \t" );
    // read the PI names one by one
    while ( pTemp = strtok( NULL, " \t" ) )
    {
        if ( Ntk_NetworkFindNodeByName( pNet, pTemp ) )
        {
            p->LineCur = p->pDotInputs[Line];
            sprintf( p->sError, "Re-definion of primary input \"%s\".", pTemp );
            Io_ReadPrintErrorMessage( p );
            return 1;
        }
        if ( p->fParsingExdcNet )
        {
            if ( !Ntk_NetworkFindNodeByName( p->pNet, pTemp ) )
            {
                p->LineCur = p->pDotInputs[Line];
                sprintf( p->sError, "CI \"%s\" of the EXDC network is missing in the primary network.", pTemp );
                Io_ReadPrintErrorMessage( p );
                return 1;
            }
        }
        Ntk_NetworkFindOrAddNodeByName( pNet, pTemp, MV_NODE_CI );
    }
    return 0;
}

/**Function*************************************************************

  Synopsis    [Reads the list of primary outputs.]

  Description []
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
int Io_ReadNetworkCos( Io_Read_t * p, int Line, Ntk_Network_t * pNet )
{
    Ntk_Node_t * pNode;
    char * pTemp;
    // make sure this is indeed the .outputs line
    assert( strncmp( p->pLines[p->pDotOutputs[Line]], ".outputs", 8 ) == 0 );
    // skip the ".outputs" word
    pTemp = strtok( p->pLines[p->pDotOutputs[Line]], " \t" );
    // read the PO names one by one
    while ( pTemp = strtok( NULL, " \t" ) )
    {
        // in some benchmarks (for example, "c2670.blif")
        // some CO nodes have the same name as CI nodes
        // following the tradition of SIS, these CI nodes are renamed...
        pNode = Ntk_NetworkFindNodeByName( pNet, pTemp );