mpserv_eb42_probe.dbs

This an example of how to install and use interrupts on AT91M4800A-embedded systems when building an

#--------------------------------------------------------------------------------------
#      ATMEL Microcontroller Software Support  -  ROUSSET  -
#--------------------------------------------------------------------------------------
# The software is delivered "AS IS" without warranty or condition of any
# kind, either express, implied or statutory. This includes without
# limitation any warranty or condition with respect to merchantability or
# fitness for any particular purpose, or against the infringements of
# intellectual property rights of others.
#--------------------------------------------------------------------------------------
# File Name           : mpserv_eb42.dbs
# Object              : Setup script for the Ateml AT91 board EB42 (Green Hills probes) 
#			with specifc board initialisation
#				- PLL
#				- EBI
#
# 1.0 21/Oct/02 JPP    : Creation
# 1.1 13/Feb/03 SC     : Set the PMC_CGMR in known state before all.
#			 Modification at PMC Level => add "while" loop to wait the 
#		         PLL lock.
#--------------------------------------------------------------------------------------

# =======================================================
# JTAG Setting                                         -
# =======================================================

# Firstly, we decrease the JTAG clock frequency to avoid bad reading or writing in the case of the processor's clock
# is working at low speed (32 kHz).
set clock 10000

# Setup script for the Atmel AT91 board
# jr: Reset the JTAG TAP controller.
jr

# This command is necessary before to perform any read or write access to the processor
# halt: halt execution
halt

# =======================================================
# Watchdog Setting                                         -
# =======================================================

#Disable External Watchdog assertion
m 0xffff8008=0x0

# =======================================================
# PMC From 32 kHz Clock Frequency to 32MHz PLL output  -
# =======================================================
# Set the PMC in default State without to know the initial value:
# The PMC_CGMR modification must be performed according to the
# data writen already.
# This script set the PMC_CGMR in the default state (known state)
# ,i.e. 0x0., and step up the Clock Frequency.  

# WARNING: It is important to select the PLL in the first write
# after the power up of the AT91M42800A. Therefore, the first
# PMC_CGMR writing will set the PLLS field (PLLB selected)
m 0xffff4020 = 0x8

# Without know, switch to the Oscillator output (CSS = 0)
m 0xffff4020 = 0xC503E718

#Shut down the PLL => The PMC_CGMR is in the default value at power up
m 0xffff4020 = 0x0

#-------------
# PLL Starting
#-------------
# At reset, the main clock is the output of the Slow clock oscillator, i.e 32,768kHz
# Set up the Clock frequency to run at 32,768 MHz with PLLB / PLLCOUNT = 197 (6ms, 0xC5), 
# MUL=999 to have a real frequency multiplier equa l to 1000 (0x3E7 + 1), PLLB
m 0xffff4020 = 0xC503E708

# Wait for the PLL is stabilized. Waiting for the APMC_PLL_LOCK Bit, in APMC_SR, is set
lock_checking=m 0xffff4030
while (lock_checking != 1)
print PLL is not ready
lock_checking=m 0xffff4030
endwhile
print
print OK, the PLL is ready now
print 

# Switch from the Master Clock from the 32 kHz Oscillator to the PLLB output (32MHz) / CSS = 1
m 0xffff4020=0xC503E798

# Now, we step up the JTAG clock frequency up to 8MHz
set clock 8000000

# =======================================================
# Now the AT91M42800A is working at 32 MHz.
# EBI Setting
# =======================================================

if (m 0xffe00000 == 0x0000203d)
print AT91 reset
endif

print set the EBI value for load application
# EBI_CSR0 connected to the flash memory.
# Settings : EBI_BA=0x01000000 / EBI_CSEN / EBI_BAT_BYTE_WRITE / EBI_TDF_2 / EBI_PAGES_16M / EBI_NWS_3 / EBI_DBW_16
m 0xffe00000=0x01002529

# EBI_CSR1 connected to the External SRAM memory.
# Settings : EBI_BA=0x02000000 / EBI_CSEN / EBI_BAT_BYTE_WRITE / EBI_TDF_0 / EBI_PAGES_16M / EBI_NWS_1 / EBI_DBW_16
m 0xffe00004=0x02002121

# AT91 REMAP Done
m 0xffe00020=0x00000001

# 2M bytes per Chip Select
m 0xffe00024=0x00000006

# Get the Chip ID
print Chip ID
m 0xfff00000

# Get the Lists all breakpoints.
print Get the Lists all breakpoints.
bl
print Display current target status information.
ti

#set All register for RESET
reg r0 0x0
reg r1 0x0
reg r2 0x0
reg r3 0x0
reg r4 0x0
reg r5 0x0
reg r6 0x0
reg r7 0x0
reg r8 0x0
reg r9 0x0
reg r10 0x0
reg r11 0x0
reg r12 0x0
reg sp 0x0
reg lr 0x0
reg pc 0x0

# Set the mode register
reg cpsr 0xd3