arcnet-hardware.txt

《嵌入式系统设计与实例开发实验教材二源码》Linux内核移植与编译实验

Switches        RAM           ROM
12345           Address Range  Address Range
00000		C:0000-C:07ff	C:2000-C:3fff
10000		C:0800-C:0fff
01000		C:1000-C:17ff
11000		C:1800-C:1fff
00100		C:4000-C:47ff	C:6000-C:7fff
10100		C:4800-C:4fff
01100		C:5000-C:57ff 
11100		C:5800-C:5fff
00010		C:C000-C:C7ff	C:E000-C:ffff
10010		C:C800-C:Cfff
01010		C:D000-C:D7ff
11010		C:D800-C:Dfff
00110		D:0000-D:07ff	D:2000-D:3fff
10110		D:0800-D:0fff
01110		D:1000-D:17ff
11110		D:1800-D:1fff
00001		D:4000-D:47ff	D:6000-D:7fff
10001		D:4800-D:4fff
01001		D:5000-D:57ff
11001		D:5800-D:5fff
00101		D:8000-D:87ff	D:A000-D:bfff
10101		D:8800-D:8fff
01101		D:9000-D:97ff
11101		D:9800-D:9fff 
00011		D:C000-D:c7ff	D:E000-D:ffff
10011		D:C800-D:cfff
01011		D:D000-D:d7ff
11011		D:D800-D:dfff
00111		E:0000-E:07ff	E:2000-E:3fff
10111		E:0800-E:0fff
01111		E:1000-E:17ff
11111		E:1800-E:1fff


*****************************************************************************

** PureData Corp **
PDI507 (8-bit card)
--------------------
  - from Mark Rejhon <[e-mail]> (slight modifications by Avery)
  - Avery's note: I think PDI508 cards (but definitely NOT PDI508Plus cards)
    are mostly the same as this.  PDI508Plus cards appear to be mainly
    software-configured.

Jumpers:
	There is a jumper array at the bottom of the card, near the edge
        connector.  This array is labelled J1.  They control the IRQs and
        something else.  Put only one jumper on the IRQ pins.

	ETS1, ETS2 are for timing on very long distance networks.  See the
	more general information near the top of this file.

	There is a J2 jumper on two pins.  A jumper should be put on them,
        since it was already there when I got the card.  I don't know what
        this jumper is for though.

	There is a two-jumper array for J3.  I don't know what it is for,
        but there were already two jumpers on it when I got the card.  It's
        a six pin grid in a two-by-three fashion.  The jumpers were
        configured as follows:

	   .-------.
	 o | o   o |
	   :-------:    ------> Accessible end of card with connectors
	 o | o   o |             in this direction ------->
	   `-------'

Carl de Billy <[e-mail]> explains J3 and J4:

	J3 Diagram:

           .-------.
         o | o   o |
           :-------:    TWIST Technology
         o | o   o |
           `-------'
           .-------.
           | o   o | o
           :-------:    COAX Technology
           | o   o | o
           `-------'

  - If using coax cable in a bus topology the J4 jumper must be removed;
    place it on one pin.

  - If using bus topology with twisted pair wiring move the J3 
    jumpers so they connect the middle pin and the pins closest to the RJ11
    Connectors.  Also the J4 jumper must be removed; place it on one pin of
    J4 jumper for storage.

  - If using  star topology with twisted pair wiring move the J3 
    jumpers so they connect the middle pin and the pins closest to the RJ11
    connectors.


DIP Switches:

	The DIP switches accessible on the accessible end of the card while
        it is installed, is used to set the ARCnet address.  There are 8
        switches.  Use an address from 1 to 254.

	Switch No.
	12345678	ARCnet address
	-----------------------------------------
	00000000	FF  	(Don't use this!)
	00000001	FE
	00000010	FD
	....
	11111101	2	
	11111110	1
	11111111	0	(Don't use this!)

	There is another array of eight DIP switches at the top of the
        card.  There are five labelled MS0-MS4 which seem to control the
        memory address, and another three labelled IO0-IO2 which seem to
        control the base I/O address of the card.

	This was difficult to test by trial and error, and the I/O addresses
        are in a weird order.  This was tested by setting the DIP switches,
        rebooting the computer, and attempting to load ARCETHER at various
        addresses (mostly between 0x200 and 0x400).  The address that caused
        the red transmit LED to blink, is the one that I thought works.

	Also, the address 0x3D0 seem to have a special meaning, since the
        ARCETHER packet driver loaded fine, but without the red LED
        blinking.  I don't know what 0x3D0 is for though.  I recommend using
        an address of 0x300 since Windows may not like addresses below
        0x300.

	IO Switch No.
	210             I/O address
	-------------------------------
	111             0x260
	110             0x290
	101             0x2E0
	100             0x2F0
	011             0x300
	010             0x350
	001             0x380
	000             0x3E0

	The memory switches set a reserved address space of 0x1000 bytes
        (0x100 segment units, or 4k).  For example if I set an address of
        0xD000, it will use up addresses 0xD000 to 0xD100.

	The memory switches were tested by booting using QEMM386 stealth,
        and using LOADHI to see what address automatically became excluded
        from the upper memory regions, and then attempting to load ARCETHER
        using these addresses.

	I recommend using an ARCnet memory address of 0xD000, and putting
        the EMS page frame at 0xC000 while using QEMM stealth mode.  That
        way, you get contiguous high memory from 0xD100 almost all the way
        the end of the megabyte.

	Memory Switch 0 (MS0) didn't seem to work properly when set to OFF
        on my card.  It could be malfunctioning on my card.  Experiment with
        it ON first, and if it doesn't work, set it to OFF.  (It may be a
        modifier for the 0x200 bit?)

	MS Switch No.
	43210           Memory address
	--------------------------------
	00001           0xE100  (guessed - was not detected by QEMM)
	00011           0xE000  (guessed - was not detected by QEMM)
	00101           0xDD00
	00111           0xDC00
	01001           0xD900
	01011           0xD800
	01101           0xD500
	01111           0xD400
	10001           0xD100
	10011           0xD000
	10101           0xCD00
	10111           0xCC00
	11001           0xC900 (guessed - crashes tested system)
	11011           0xC800 (guessed - crashes tested system)
	11101           0xC500 (guessed - crashes tested system)
	11111           0xC400 (guessed - crashes tested system)
	
	
*****************************************************************************

** CNet Technology Inc. **
120 Series (8-bit cards)
------------------------
  - from Juergen Seifert <[e-mail]>


CNET TECHNOLOGY INC. (CNet) ARCNET 120A SERIES
==============================================

This description has been written by Juergen Seifert <[e-mail]>
using information from the following Original CNet Manual 

              "ARCNET
            USER'S MANUAL 
                for
               CN120A
               CN120AB
               CN120TP
               CN120ST
               CN120SBT
             P/N:12-01-0007
             Revision 3.00"

ARCNET is a registered trademark of the Datapoint Corporation

P/N 120A   ARCNET 8 bit XT/AT Star
P/N 120AB  ARCNET 8 bit XT/AT Bus
P/N 120TP  ARCNET 8 bit XT/AT Twisted Pair
P/N 120ST  ARCNET 8 bit XT/AT Star, Twisted Pair
P/N 120SBT ARCNET 8 bit XT/AT Star, Bus, Twisted Pair

    __________________________________________________________________
   |                                                                  |
   |                                                               ___|
   |                                                          LED |___|
   |                                                               ___|
   |                                                            N |   | ID7
   |                                                            o |   | ID6
   |                                                            d | S | ID5
   |                                                            e | W | ID4
   |                     ___________________                    A | 2 | ID3
   |                    |                   |                   d |   | ID2
   |                    |                   |  1 2 3 4 5 6 7 8  d |   | ID1
   |                    |                   | _________________ r |___| ID0
   |                    |      90C65        ||       SW1       |  ____|
   |  JP 8 7            |                   ||_________________| |    |
   |    |o|o|  JP1      |                   |                    | J2 |
   |    |o|o|  |oo|     |                   |         JP 1 1 1   |    |
   |   ______________   |                   |            0 1 2   |____|
   |  |  PROM        |  |___________________|           |o|o|o|  _____|
   |  >  SOCKET      |  JP 6 5 4 3 2                    |o|o|o| | J1  |
   |  |______________|    |o|o|o|o|o|                   |o|o|o| |_____|
   |_____                 |o|o|o|o|o|                   ______________|
         |                                             |
         |_____________________________________________|

Legend:

90C65       ARCNET Probe
S1  1-5:    Base Memory Address Select
    6-8:    Base I/O Address Select
S2  1-8:    Node ID Select (ID0-ID7)
JP1     ROM Enable Select
JP2     IRQ2
JP3     IRQ3
JP4     IRQ4
JP5     IRQ5
JP6     IRQ7
JP7/JP8     ET1, ET2 Timeout Parameters
JP10/JP11   Coax / Twisted Pair Select  (CN120ST/SBT only)
JP12        Terminator Select       (CN120AB/ST/SBT only)
J1      BNC RG62/U Connector        (all except CN120TP)
J2      Two 6-position Telephone Jack   (CN120TP/ST/SBT only)

Setting one of the switches to Off means "1", On means "0".


Setting the Node ID
-------------------

The eight switches in SW2 are used to set the node ID. Each node attached
to the network must have an unique node ID which must be different from 0.
Switch 1 (ID0) serves as the least significant bit (LSB).

The node ID is the sum of the values of all switches set to "1"  
These values are:

   Switch | Label | Value
   -------|-------|-------
     1    | ID0   |   1
     2    | ID1   |   2
     3    | ID2   |   4
     4    | ID3   |   8
     5    | ID4   |  16
     6    | ID5   |  32
     7    | ID6   |  64
     8    | ID7   | 128

Some Examples:

    Switch         | Hex     | Decimal 
   8 7 6 5 4 3 2 1 | Node ID | Node ID
   ----------------|---------|---------
   0 0 0 0 0 0 0 0 |    not allowed
   0 0 0 0 0 0 0 1 |    1    |    1 
   0 0 0 0 0 0 1 0 |    2    |    2
   0 0 0 0 0 0 1 1 |    3    |    3
       . . .       |         |
   0 1 0 1 0 1 0 1 |   55    |   85
       . . .       |         |
   1 0 1 0 1 0 1 0 |   AA    |  170
       . . .       |         |  
   1 1 1 1 1 1 0 1 |   FD    |  253
   1 1 1 1 1 1 1 0 |   FE    |  254
   1 1 1 1 1 1 1 1 |   FF    |  255


Setting the I/O Base Address
----------------------------

The last three switches in switch block SW1 are used to select one
of eight possible I/O Base addresses using the following table


   Switch      | Hex I/O
    6   7   8  | Address
   ------------|--------
   ON  ON  ON  |  260
   OFF ON  ON  |  290
   ON  OFF ON  |  2E0  (Manufacturer's default)
   OFF OFF ON  |  2F0
   ON  ON  OFF |  300
   OFF ON  OFF |  350
   ON  OFF OFF |  380
   OFF OFF OFF |  3E0


Setting the Base Memory (RAM) buffer Address
--------------------------------------------

The memory buffer (RAM) requires 2K. The base of this buffer can be 
located in any of eight positions. The address of the Boot Prom is
memory base + 8K or memory base + 0x2000.
Switches 1-5 of switch block SW1 select the Memory Base address.

   Switch              | Hex RAM | Hex ROM
    1   2   3   4   5  | Address | Address *)
   --------------------|---------|-----------
   ON  ON  ON  ON  ON  |  C0000  |  C2000
   ON  ON  OFF ON  ON  |  C4000  |  C6000
   ON  ON  ON  OFF ON  |  CC000  |  CE000
   ON  ON  OFF OFF ON  |  D0000  |  D2000  (Manufacturer's default)
   ON  ON  ON  ON  OFF |  D4000  |  D6000
   ON  ON  OFF ON  OFF |  D8000  |  DA000
   ON  ON  ON  OFF OFF |  DC000  |  DE000
   ON  ON  OFF OFF OFF |  E0000  |  E2000
  
*) To enable the Boot ROM install the jumper JP1

Note: Since the switches 1 and 2 are always set to ON it may be possible
      that they can be used to add an offset of 2K, 4K or 6K to the base
      address, but this feature is not documented in the manual and I
      haven't tested it yet.


Setting the Interrupt Line
--------------------------

To select a hardware interrupt level install one (only one!) of the jumpers
JP2, JP3, JP4, JP5, JP6. JP2 is the default.

   Jumper | IRQ