core_t2.h

《嵌入式系统设计与实例开发实验教材二源码》Linux内核移植与编译实验

	unsigned long elcpb_biu_stat;
	unsigned long elcpb_biu_addr;
	unsigned long elcpb_biu_ctl;
	unsigned long elcpb_fill_syndrome;
	unsigned long elcpb_fill_addr;
	unsigned long elcpb_bc_tag;
};

/*
 * Sable error log data structure
 * Note there are 4 memory slots on sable (see t2.h)
 */
struct el_t2_frame_mcheck {
	struct el_t2_frame_header elfmc_header;	/* ID$P-FRAME_MCHECK */
	struct el_t2_logout_header elfmc_hdr;
	struct el_t2_procdata_mcheck elfmc_procdata;
	struct el_t2_sysdata_mcheck elfmc_sysdata;
	struct el_t2_data_t2 elfmc_t2data;
	struct el_t2_data_memory elfmc_memdata[4];
	struct el_t2_frame_header elfmc_footer;	/* empty */
};


/*
 * Sable error log data structures on memory errors
 */
struct el_t2_frame_corrected {
	struct el_t2_frame_header elfcc_header;	/* ID$P-BC-COR */
	struct el_t2_logout_header elfcc_hdr;
	struct el_t2_data_corrected elfcc_procdata;
/*	struct el_t2_data_t2 elfcc_t2data;		*/
/*	struct el_t2_data_memory elfcc_memdata[4];	*/
	struct el_t2_frame_header elfcc_footer;	/* empty */
};


#ifdef __KERNEL__

#ifndef __EXTERN_INLINE
#define __EXTERN_INLINE extern inline
#define __IO_EXTERN_INLINE
#endif

/*
 * I/O functions:
 *
 * T2 (the core logic PCI/memory support chipset for the SABLE
 * series of processors uses a sparse address mapping scheme to
 * get at PCI memory and I/O.
 */

#define vip	volatile int *
#define vuip	volatile unsigned int *

__EXTERN_INLINE u8 t2_inb(unsigned long addr)
{
	long result = *(vip) ((addr << 5) + T2_IO + 0x00);
	return __kernel_extbl(result, addr & 3);
}

__EXTERN_INLINE void t2_outb(u8 b, unsigned long addr)
{
	unsigned long w;

	w = __kernel_insbl(b, addr & 3);
	*(vuip) ((addr << 5) + T2_IO + 0x00) = w;
	mb();
}

__EXTERN_INLINE u16 t2_inw(unsigned long addr)
{
	long result = *(vip) ((addr << 5) + T2_IO + 0x08);
	return __kernel_extwl(result, addr & 3);
}

__EXTERN_INLINE void t2_outw(u16 b, unsigned long addr)
{
	unsigned long w;

	w = __kernel_inswl(b, addr & 3);
	*(vuip) ((addr << 5) + T2_IO + 0x08) = w;
	mb();
}

__EXTERN_INLINE u32 t2_inl(unsigned long addr)
{
	return *(vuip) ((addr << 5) + T2_IO + 0x18);
}

__EXTERN_INLINE void t2_outl(u32 b, unsigned long addr)
{
	*(vuip) ((addr << 5) + T2_IO + 0x18) = b;
	mb();
}


/*
 * Memory functions.
 *
 * For reading and writing 8 and 16 bit quantities we need to
 * go through one of the three sparse address mapping regions
 * and use the HAE_MEM CSR to provide some bits of the address.
 * The following few routines use only sparse address region 1
 * which gives 1Gbyte of accessible space which relates exactly
 * to the amount of PCI memory mapping *into* system address space.
 * See p 6-17 of the specification but it looks something like this:
 *
 * 21164 Address:
 *
 *          3         2         1
 * 9876543210987654321098765432109876543210
 * 1ZZZZ0.PCI.QW.Address............BBLL
 *
 * ZZ = SBZ
 * BB = Byte offset
 * LL = Transfer length
 *
 * PCI Address:
 *
 * 3         2         1
 * 10987654321098765432109876543210
 * HHH....PCI.QW.Address........ 00
 *
 * HHH = 31:29 HAE_MEM CSR
 *
 */

__EXTERN_INLINE u8 t2_readb(unsigned long addr)
{
	unsigned long result, msb;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	result = *(vip) ((addr << 5) + T2_SPARSE_MEM + 0x00);
	return __kernel_extbl(result, addr & 3);
}

__EXTERN_INLINE u16 t2_readw(unsigned long addr)
{
	unsigned long result, msb;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08);
	return __kernel_extwl(result, addr & 3);
}

/* On SABLE with T2, we must use SPARSE memory even for 32-bit access. */
__EXTERN_INLINE u32 t2_readl(unsigned long addr)
{
	unsigned long msb;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	return *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18);
}

__EXTERN_INLINE u64 t2_readq(unsigned long addr)
{
	unsigned long r0, r1, work, msb;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	work = (addr << 5) + T2_SPARSE_MEM + 0x18;
	r0 = *(vuip)(work);
	r1 = *(vuip)(work + (4 << 5));
	return r1 << 32 | r0;
}

__EXTERN_INLINE void t2_writeb(u8 b, unsigned long addr)
{
	unsigned long msb, w;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	w = __kernel_insbl(b, addr & 3);
	*(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x00) = w;
}

__EXTERN_INLINE void t2_writew(u16 b, unsigned long addr)
{
	unsigned long msb, w;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	w = __kernel_inswl(b, addr & 3);
	*(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08) = w;
}

/* On SABLE with T2, we must use SPARSE memory even for 32-bit access. */
__EXTERN_INLINE void t2_writel(u32 b, unsigned long addr)
{
	unsigned long msb;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	*(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18) = b;
}

__EXTERN_INLINE void t2_writeq(u64 b, unsigned long addr)
{
	unsigned long msb, work;

	msb = addr & 0xE0000000;
	addr &= T2_MEM_R1_MASK;
	set_hae(msb);

	work = (addr << 5) + T2_SPARSE_MEM + 0x18;
	*(vuip)work = b;
	*(vuip)(work + (4 << 5)) = b >> 32;
}

__EXTERN_INLINE unsigned long t2_ioremap(unsigned long addr, 
					 unsigned long size
					 __attribute__((unused)))
{
	return addr;
}

__EXTERN_INLINE void t2_iounmap(unsigned long addr)
{
	return;
}

__EXTERN_INLINE int t2_is_ioaddr(unsigned long addr)
{
	return (long)addr >= 0;
}

#undef vip
#undef vuip

#ifdef __WANT_IO_DEF

#define __inb(p)		t2_inb((unsigned long)(p))
#define __inw(p)		t2_inw((unsigned long)(p))
#define __inl(p)		t2_inl((unsigned long)(p))
#define __outb(x,p)		t2_outb((x),(unsigned long)(p))
#define __outw(x,p)		t2_outw((x),(unsigned long)(p))
#define __outl(x,p)		t2_outl((x),(unsigned long)(p))
#define __readb(a)		t2_readb((unsigned long)(a))
#define __readw(a)		t2_readw((unsigned long)(a))
#define __readl(a)		t2_readl((unsigned long)(a))
#define __readq(a)		t2_readq((unsigned long)(a))
#define __writeb(x,a)		t2_writeb((x),(unsigned long)(a))
#define __writew(x,a)		t2_writew((x),(unsigned long)(a))
#define __writel(x,a)		t2_writel((x),(unsigned long)(a))
#define __writeq(x,a)		t2_writeq((x),(unsigned long)(a))
#define __ioremap(a,s)		t2_ioremap((unsigned long)(a),(s))
#define __iounmap(a)		t2_iounmap((unsigned long)(a))
#define __is_ioaddr(a)		t2_is_ioaddr((unsigned long)(a))

#endif /* __WANT_IO_DEF */

#ifdef __IO_EXTERN_INLINE
#undef __EXTERN_INLINE
#undef __IO_EXTERN_INLINE
#endif

#endif /* __KERNEL__ */

#endif /* __ALPHA_T2__H__ */