core_cia.h

《嵌入式系统设计与实例开发实验教材二源码》Linux内核移植与编译实验

__EXTERN_INLINE u8 cia_inb(unsigned long addr)
{
	long result;
	result = *(vip) ((addr << 5) + CIA_IO + 0x00);
	return __kernel_extbl(result, addr & 3);
}

__EXTERN_INLINE void cia_outb(u8 b, unsigned long addr)
{
	unsigned long w = __kernel_insbl(b, addr & 3);
	*(vuip) ((addr << 5) + CIA_IO + 0x00) = w;
	mb();
}

__EXTERN_INLINE u16 cia_inw(unsigned long addr)
{
	long result;
	result = *(vip) ((addr << 5) + CIA_IO + 0x08);
	return __kernel_extwl(result, addr & 3);
}

__EXTERN_INLINE void cia_outw(u16 b, unsigned long addr)
{
	unsigned long w = __kernel_inswl(b, addr & 3);
	*(vuip) ((addr << 5) + CIA_IO + 0x08) = w;
	mb();
}

__EXTERN_INLINE u32 cia_inl(unsigned long addr)
{
	return *(vuip) ((addr << 5) + CIA_IO + 0x18);
}

__EXTERN_INLINE void cia_outl(u32 b, unsigned long addr)
{
	*(vuip) ((addr << 5) + CIA_IO + 0x18) = b;
	mb();
}

__EXTERN_INLINE u8 cia_bwx_inb(unsigned long addr)
{
	/* ??? I wish I could get rid of this.  But there's no ioremap
	   equivalent for I/O space.  PCI I/O can be forced into the
	   CIA BWX I/O region, but that doesn't take care of legacy
	   ISA crap.  */

	return __kernel_ldbu(*(vucp)(addr+CIA_BW_IO));
}

__EXTERN_INLINE void cia_bwx_outb(u8 b, unsigned long addr)
{
	__kernel_stb(b, *(vucp)(addr+CIA_BW_IO));
	mb();
}

__EXTERN_INLINE u16 cia_bwx_inw(unsigned long addr)
{
	return __kernel_ldwu(*(vusp)(addr+CIA_BW_IO));
}

__EXTERN_INLINE void cia_bwx_outw(u16 b, unsigned long addr)
{
	__kernel_stw(b, *(vusp)(addr+CIA_BW_IO));
	mb();
}

__EXTERN_INLINE u32 cia_bwx_inl(unsigned long addr)
{
	return *(vuip)(addr+CIA_BW_IO);
}

__EXTERN_INLINE void cia_bwx_outl(u32 b, unsigned long addr)
{
	*(vuip)(addr+CIA_BW_IO) = b;
	mb();
}


/*
 * Memory functions.  64-bit and 32-bit accesses are done through
 * dense memory space, everything else through sparse space.
 *
 * For reading and writing 8 and 16 bit quantities we need to
 * go through one of the three sparse address mapping regions
 * and use the HAE_MEM CSR to provide some bits of the address.
 * The following few routines use only sparse address region 1
 * which gives 1Gbyte of accessible space which relates exactly
 * to the amount of PCI memory mapping *into* system address space.
 * See p 6-17 of the specification but it looks something like this:
 *
 * 21164 Address:
 *
 *          3         2         1
 * 9876543210987654321098765432109876543210
 * 1ZZZZ0.PCI.QW.Address............BBLL
 *
 * ZZ = SBZ
 * BB = Byte offset
 * LL = Transfer length
 *
 * PCI Address:
 *
 * 3         2         1
 * 10987654321098765432109876543210
 * HHH....PCI.QW.Address........ 00
 *
 * HHH = 31:29 HAE_MEM CSR
 *
 */

__EXTERN_INLINE u8 cia_readb(unsigned long addr)
{
	unsigned long result;

	addr &= CIA_MEM_R1_MASK;
	result = *(vip) ((addr << 5) + CIA_SPARSE_MEM + 0x00);
	return __kernel_extbl(result, addr & 3);
}

__EXTERN_INLINE u16 cia_readw(unsigned long addr)
{
	unsigned long result;

	addr &= CIA_MEM_R1_MASK;
	result = *(vip) ((addr << 5) + CIA_SPARSE_MEM + 0x08);
	return __kernel_extwl(result, addr & 3);
}

__EXTERN_INLINE void cia_writeb(u8 b, unsigned long addr)
{
	unsigned long w;

	addr &= CIA_MEM_R1_MASK;
	w = __kernel_insbl(b, addr & 3);
	*(vuip) ((addr << 5) + CIA_SPARSE_MEM + 0x00) = w;
}

__EXTERN_INLINE void cia_writew(u16 b, unsigned long addr)
{
	unsigned long w;

	addr &= CIA_MEM_R1_MASK;
	w = __kernel_inswl(b, addr & 3);
	*(vuip) ((addr << 5) + CIA_SPARSE_MEM + 0x08) = w;
}

__EXTERN_INLINE u32 cia_readl(unsigned long addr)
{
	return *(vuip)addr;
}

__EXTERN_INLINE u64 cia_readq(unsigned long addr)
{
	return *(vulp)addr;
}

__EXTERN_INLINE void cia_writel(u32 b, unsigned long addr)
{
	*(vuip)addr = b;
}

__EXTERN_INLINE void cia_writeq(u64 b, unsigned long addr)
{
	*(vulp)addr = b;
}

__EXTERN_INLINE unsigned long cia_ioremap(unsigned long addr,
					  unsigned long size
					  __attribute__((unused)))
{
	return addr + CIA_DENSE_MEM;
}

__EXTERN_INLINE void cia_iounmap(unsigned long addr)
{
	return;
}

__EXTERN_INLINE u8 cia_bwx_readb(unsigned long addr)
{
	return __kernel_ldbu(*(vucp)addr);
}

__EXTERN_INLINE u16 cia_bwx_readw(unsigned long addr)
{
	return __kernel_ldwu(*(vusp)addr);
}

__EXTERN_INLINE u32 cia_bwx_readl(unsigned long addr)
{
	return *(vuip)addr;
}

__EXTERN_INLINE u64 cia_bwx_readq(unsigned long addr)
{
	return *(vulp)addr;
}

__EXTERN_INLINE void cia_bwx_writeb(u8 b, unsigned long addr)
{
	__kernel_stb(b, *(vucp)addr);
}

__EXTERN_INLINE void cia_bwx_writew(u16 b, unsigned long addr)
{
	__kernel_stw(b, *(vusp)addr);
}

__EXTERN_INLINE void cia_bwx_writel(u32 b, unsigned long addr)
{
	*(vuip)addr = b;
}

__EXTERN_INLINE void cia_bwx_writeq(u64 b, unsigned long addr)
{
	*(vulp)addr = b;
}

__EXTERN_INLINE unsigned long cia_bwx_ioremap(unsigned long addr,
					      unsigned long size)
{
	return addr + CIA_BW_MEM;
}

__EXTERN_INLINE void cia_bwx_iounmap(unsigned long addr)
{
	return;
}

__EXTERN_INLINE int cia_is_ioaddr(unsigned long addr)
{
	return addr >= IDENT_ADDR + 0x8000000000UL;
}

#undef vucp
#undef vusp
#undef vip
#undef vuip
#undef vulp

#ifdef __WANT_IO_DEF

#ifdef CONFIG_ALPHA_PYXIS
# define __inb(p)		cia_bwx_inb((unsigned long)(p))
# define __inw(p)		cia_bwx_inw((unsigned long)(p))
# define __inl(p)		cia_bwx_inl((unsigned long)(p))
# define __outb(x,p)		cia_bwx_outb((x),(unsigned long)(p))
# define __outw(x,p)		cia_bwx_outw((x),(unsigned long)(p))
# define __outl(x,p)		cia_bwx_outl((x),(unsigned long)(p))
# define __readb(a)		cia_bwx_readb((unsigned long)(a))
# define __readw(a)		cia_bwx_readw((unsigned long)(a))
# define __readl(a)		cia_bwx_readl((unsigned long)(a))
# define __readq(a)		cia_bwx_readq((unsigned long)(a))
# define __writeb(x,a)		cia_bwx_writeb((x),(unsigned long)(a))
# define __writew(x,a)		cia_bwx_writew((x),(unsigned long)(a))
# define __writel(x,a)		cia_bwx_writel((x),(unsigned long)(a))
# define __writeq(x,a)		cia_bwx_writeq((x),(unsigned long)(a))
# define __ioremap(a,s)		cia_bwx_ioremap((unsigned long)(a),(s))
# define __iounmap(a)           cia_bwx_iounmap((unsigned long)(a))
# define inb(p)			__inb(p)
# define inw(p)			__inw(p)
# define inl(p)			__inl(p)
# define outb(x,p)		__outb((x),(p))
# define outw(x,p)		__outw((x),(p))
# define outl(x,p)		__outl((x),(p))
# define __raw_readb(a)		__readb(a)
# define __raw_readw(a)		__readw(a)
# define __raw_readl(a)		__readl(a)
# define __raw_readq(a)		__readq(a)
# define __raw_writeb(x,a)	__writeb((x),(a))
# define __raw_writew(x,a)	__writew((x),(a))
# define __raw_writel(x,a)	__writel((x),(a))
# define __raw_writeq(x,a)	__writeq((x),(a))
#else
# define __inb(p)		cia_inb((unsigned long)(p))
# define __inw(p)		cia_inw((unsigned long)(p))
# define __inl(p)		cia_inl((unsigned long)(p))
# define __outb(x,p)		cia_outb((x),(unsigned long)(p))
# define __outw(x,p)		cia_outw((x),(unsigned long)(p))
# define __outl(x,p)		cia_outl((x),(unsigned long)(p))
# define __readb(a)		cia_readb((unsigned long)(a))
# define __readw(a)		cia_readw((unsigned long)(a))
# define __readl(a)		cia_readl((unsigned long)(a))
# define __readq(a)		cia_readq((unsigned long)(a))
# define __writeb(x,a)		cia_writeb((x),(unsigned long)(a))
# define __writew(x,a)		cia_writew((x),(unsigned long)(a))
# define __writel(x,a)		cia_writel((x),(unsigned long)(a))
# define __writeq(x,a)		cia_writeq((x),(unsigned long)(a))
# define __ioremap(a,s)		cia_ioremap((unsigned long)(a),(s))
# define __iounmap(a)           cia_iounmap((unsigned long)(a))
# define __raw_readl(a)		__readl(a)
# define __raw_readq(a)		__readq(a)
# define __raw_writel(v,a)	__writel((v),(a))
# define __raw_writeq(v,a)	__writeq((v),(a))
#endif /* PYXIS */

#define __is_ioaddr(a)		cia_is_ioaddr((unsigned long)(a))

#endif /* __WANT_IO_DEF */

#ifdef __IO_EXTERN_INLINE
#undef __EXTERN_INLINE
#undef __IO_EXTERN_INLINE
#endif

#endif /* __KERNEL__ */

#endif /* __ALPHA_CIA__H__ */