📄 entry.s
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/* * arch/s390/kernel/entry.S * S390 low-level entry points. * * S390 version * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), * Hartmut Penner (hp@de.ibm.com), * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), */#include <linux/sys.h>#include <linux/linkage.h>#include <linux/config.h>#include <asm/cache.h>#include <asm/lowcore.h>#include <asm/errno.h>#include <asm/smp.h>#include <asm/ptrace.h>/* * Stack layout for the system_call stack entry. * The first few entries are identical to the user_regs_struct. */SP_PTREGS = STACK_FRAME_OVERHEAD SP_PSW = STACK_FRAME_OVERHEAD + PT_PSWMASKSP_R0 = STACK_FRAME_OVERHEAD + PT_GPR0SP_R1 = STACK_FRAME_OVERHEAD + PT_GPR1SP_R2 = STACK_FRAME_OVERHEAD + PT_GPR2SP_R3 = STACK_FRAME_OVERHEAD + PT_GPR3SP_R4 = STACK_FRAME_OVERHEAD + PT_GPR4SP_R5 = STACK_FRAME_OVERHEAD + PT_GPR5SP_R6 = STACK_FRAME_OVERHEAD + PT_GPR6SP_R7 = STACK_FRAME_OVERHEAD + PT_GPR7SP_R8 = STACK_FRAME_OVERHEAD + PT_GPR8SP_R9 = STACK_FRAME_OVERHEAD + PT_GPR9SP_R10 = STACK_FRAME_OVERHEAD + PT_GPR10SP_R11 = STACK_FRAME_OVERHEAD + PT_GPR11SP_R12 = STACK_FRAME_OVERHEAD + PT_GPR12SP_R13 = STACK_FRAME_OVERHEAD + PT_GPR13SP_R14 = STACK_FRAME_OVERHEAD + PT_GPR14SP_R15 = STACK_FRAME_OVERHEAD + PT_GPR15SP_AREGS = STACK_FRAME_OVERHEAD + PT_ACR0SP_ORIG_R2 = STACK_FRAME_OVERHEAD + PT_ORIGGPR2/* Now the additional entries */SP_TRAP = (SP_ORIG_R2+GPR_SIZE)#if CONFIG_REMOTE_DEBUGSP_CRREGS = (SP_TRAP+4)/* fpu registers are saved & restored by the gdb stub itself */SP_FPC = (SP_CRREGS+(NUM_CRS*CR_SIZE))SP_FPRS = (SP_FPC+FPC_SIZE+FPC_PAD_SIZE)SP_PGM_OLD_ILC= (SP_FPRS+(NUM_FPRS*FPR_SIZE))#elseSP_PGM_OLD_ILC= (SP_TRAP+4)#endifSP_SIZE = (SP_PGM_OLD_ILC+4)/* * these defines are offsets into the thread_struct */_TSS_PTREGS = 0_TSS_FPRS = (_TSS_PTREGS+8)_TSS_AR2 = (_TSS_FPRS+136)_TSS_AR4 = (_TSS_AR2+4)_TSS_KSP = (_TSS_AR4+4)_TSS_USERSEG = (_TSS_KSP+4)_TSS_ERROR = (_TSS_USERSEG+4)_TSS_PROT = (_TSS_ERROR+4)_TSS_TRAP = (_TSS_PROT+4)_TSS_MM = (_TSS_TRAP+4)_TSS_PER = (_TSS_MM+8)_TSS_IEEE = (_TSS_PER+36)_TSS_FLAGS = (_TSS_IEEE+4)/* * these are offsets into the task-struct. */state = 0flags = 4sigpending = 8need_resched = 24tsk_ptrace = 28processor = 52/* * Base Address of this Module --- saved in __LC_ENTRY_BASE */ .globl entry_baseentry_base:#define BASED(name) name-entry_base(%r13)/* * Register usage in interrupt handlers: * R9 - pointer to current task structure * R13 - pointer to literal pool * R14 - return register for function calls * R15 - kernel stack pointer */ .macro SAVE_ALL psworg,sync # system entry macro stm %r13,%r15,__LC_SAVE_AREA basr %r13,0 # temp base pointer l %r13,.Lentry_base-.(%r13) # load &entry_base to %r13 tm \psworg+1,0x01 # test problem state bit stam %a2,%a4,__LC_SAVE_AREA+12 .if \sync bz BASED(1f) # skip stack setup save .else bnz BASED(0f) # from user -> load kernel stack l %r14,__LC_ASYNC_STACK # are we already on the async stack ? slr %r14,%r15 sra %r14,13 be BASED(1f) l %r15,__LC_ASYNC_STACK # load async. stack b BASED(1f) .endif0: l %r15,__LC_KERNEL_STACK # problem state -> load ksp lam %a2,%a4,BASED(.Lc_ac) # set ac.reg. 2 to primary space # and ac.reg. 4 to home space1: s %r15,BASED(.Lc_spsize) # make room for registers & psw n %r15,BASED(.Lc0xfffffff8) # align stack pointer to 8 stm %r0,%r12,SP_R0(%r15) # store gprs 0-12 to kernel stack st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 mvc SP_R13(12,%r15),__LC_SAVE_AREA # move R13-R15 to stack stam %a0,%a15,SP_AREGS(%r15) # store access registers to kst. mvc SP_AREGS+8(12,%r15),__LC_SAVE_AREA+12 # store ac. regs mvc SP_PSW(8,%r15),\psworg # move user PSW to stack la %r0,\psworg # store trap indication st %r0,SP_TRAP(%r15) xc 0(4,%r15),0(%r15) # clear back chain .endm .macro RESTORE_ALL sync # system exit macro mvc __LC_RETURN_PSW(8),SP_PSW(%r15) # move user PSW to lowcore lam %a0,%a15,SP_AREGS(%r15) # load the access registers lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user ni __LC_RETURN_PSW+1,0xfd # clear wait state bit lpsw __LC_RETURN_PSW # back to caller .endm .macro GET_CURRENT l %r9,BASED(.Lc0xffffe000) # load pointer to task_struct to %r9 al %r9,__LC_KERNEL_STACK .endm/* * Scheduler resume function, called by switch_to * grp2 = (thread_struct *) prev->tss * grp3 = (thread_struct *) next->tss * Returns: * gpr2 = prev */ .globl resumeresume: basr %r1,0resume_base: l %r4,_TSS_PTREGS(%r3) tm SP_PSW-SP_PTREGS(%r4),0x40 # is the new process using per ? bz resume_noper-resume_base(%r1) # if not we're fine stctl %c9,%c11,24(%r15) # We are using per stuff clc _TSS_PER(12,%r3),24(%r15) be resume_noper-resume_base(%r1) # we got away w/o bashing TLB's lctl %c9,%c11,_TSS_PER(%r3) # Nope we didn'tresume_noper: stm %r6,%r15,24(%r15) # store resume registers of prev task st %r15,_TSS_KSP(%r2) # store kernel stack ptr to prev->tss.ksp lr %r0,%r15 n %r0,.Lc0xffffe000-resume_base(%r1) l %r15,_TSS_KSP(%r3) # load kernel stack ptr from next->tss.ksp l %r1,.Lc8191-resume_base(%r1) or %r1,%r15 la %r1,1(%r1) st %r1,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack stam %a2,%a2,_TSS_AR2(%r2) # store kernel access reg. 2 stam %a4,%a4,_TSS_AR4(%r2) # store kernel access reg. 4 lam %a2,%a2,_TSS_AR2(%r3) # load kernel access reg. 2 lam %a4,%a4,_TSS_AR4(%r3) # load kernel access reg. 4 lr %r2,%r0 # return task_struct of last task lm %r6,%r15,24(%r15) # load resume registers of next task br %r14/* * do_softirq calling function. We want to run the softirq functions on the * asynchronous interrupt stack. */ .global do_call_softirqdo_call_softirq: stm %r12,%r15,24(%r15) lr %r12,%r15 basr %r13,0do_call_base: l %r0,__LC_ASYNC_STACK slr %r0,%r15 sra %r0,13 be 0f-do_call_base(%r13) l %r15,__LC_ASYNC_STACK0: sl %r15,.Lc_overhead-do_call_base(%r13) st %r12,0(%r15) # store backchain l %r1,.Ldo_softirq-do_call_base(%r13) basr %r14,%r1 lm %r12,%r15,24(%r12) br %r14 /* * SVC interrupt handler routine. System calls are synchronous events and * are executed with interrupts enabled. */ .globl system_callsystem_call: SAVE_ALL __LC_SVC_OLD_PSW,1 mvi SP_PGM_OLD_ILC(%r15),1 # mark PGM_OLD_ILC as invalidpgm_system_call: GET_CURRENT # load pointer to task_struct to R9 slr %r8,%r8 # gpr 8 is call save (-> tracesys) ic %r8,0x8B # get svc number from lowcore stosm 24(%r15),0x03 # reenable interrupts sll %r8,2 l %r8,sys_call_table-entry_base(8,%r13) # get address of system call tm tsk_ptrace+3(%r9),0x02 # PT_TRACESYS bnz BASED(sysc_tracesys) basr %r14,%r8 # call sys_xxxx st %r2,SP_R2(%r15) # store return value (change R2 on stack) # ATTENTION: check sys_execve_glue before # changing anything here !!sysc_return: tm SP_PSW+1(%r15),0x01 # returning to user ? bno BASED(sysc_leave) # no-> skip resched & signal## check, if reschedule is needed# icm %r0,15,need_resched(%r9) # get need_resched from task_struct bnz BASED(sysc_reschedule) icm %r0,15,sigpending(%r9) # get sigpending from task_struct bnz BASED(sysc_signal_return)sysc_leave: tm SP_PGM_OLD_ILC(%r15),0xff bz BASED(pgm_svcret) stnsm 24(%r15),0xfc # disable I/O and ext. interrupts RESTORE_ALL 1## call do_signal before return#sysc_signal_return: la %r2,SP_PTREGS(%r15) # load pt_regs sr %r3,%r3 # clear *oldset l %r1,BASED(.Ldo_signal) la %r14,BASED(sysc_leave) br %r1 # return point is sysc_leave## call trace before and after sys_call#sysc_tracesys: l %r1,BASED(.Ltrace) l %r7,BASED(.Lc_ENOSYS) st %r7,SP_R2(%r15) # give sysc_trace an -ENOSYS retval basr %r14,%r1 l %r2,SP_R2(%r15) cr %r2,%r7 # compare with saved -ENOSYS be BASED(sysc_tracesys_dn1) # strace wants to change the syscall sll %r2,24 srl %r2,22 l %r8,sys_call_table-entry_base(2,%r13) # get address of system call sysc_tracesys_dn1: lm %r3,%r6,SP_R3(%r15) l %r2,SP_ORIG_R2(%r15) basr %r14,%r8 # call sys_xxx st %r2,SP_R2(%r15) # store return value l %r1,BASED(.Ltrace) la %r14,BASED(sysc_return) br %r1 # return point is sysc_return## call schedule with sysc_return as return-address#sysc_reschedule: l %r1,BASED(.Lschedule) la %r14,BASED(sysc_return) br %r1 # call scheduler, return to sysc_return## a new process exits the kernel with ret_from_fork# .globl ret_from_forkret_from_fork: basr %r13,0 l %r13,.Lentry_base-.(%r13) # setup base pointer to &entry_base GET_CURRENT # load pointer to task_struct to R9 stosm 24(%r15),0x03 # reenable interrupts sr %r0,%r0 # child returns 0 st %r0,SP_R2(%r15) # store return value (change R2 on stack)#ifdef CONFIG_SMP l %r1,BASED(.Lschedtail) la %r14,BASED(sysc_return) br %r1 # call schedule_tail, return to sysc_return
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