📄 s3c2410.h
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#define GSTATUS2 (*(volatile unsigned *)0x560000b4) //Reset type
#define GSTATUS3 (*(volatile unsigned *)0x560000b8) //Saved data0(32-bit) before entering POWER_OFF mode
#define GSTATUS4 (*(volatile unsigned *)0x560000bc) //Saved data0(32-bit) before entering POWER_OFF mode
// RTC
#ifdef __BIG_ENDIAN
#define RTCCON (*(volatile unsigned char *)0x57000043) //RTC control
#define TICNT (*(volatile unsigned char *)0x57000047) //Tick time count
#define RTCALM (*(volatile unsigned char *)0x57000053) //RTC alarm control
#define ALMSEC (*(volatile unsigned char *)0x57000057) //Alarm second
#define ALMMIN (*(volatile unsigned char *)0x5700005b) //Alarm minute
#define ALMHOUR (*(volatile unsigned char *)0x5700005f) //Alarm Hour
#define ALMDATE (*(volatile unsigned char *)0x57000063) //Alarm day <-- May 06, 2002 SOP
#define ALMMON (*(volatile unsigned char *)0x57000067) //Alarm month
#define ALMYEAR (*(volatile unsigned char *)0x5700006b) //Alarm year
#define RTCRST (*(volatile unsigned char *)0x5700006f) //RTC ound eset
#define BCDSEC (*(volatile unsigned char *)0x57000073) //BCD second
#define BCDMIN (*(volatile unsigned char *)0x57000077) //BCD minute
#define BCDHOUR (*(volatile unsigned char *)0x5700007b) //BCD hour
#define BCDDATE (*(volatile unsigned char *)0x5700007f) //BCD day <-- May 06, 2002 SOP
#define BCDDAY (*(volatile unsigned char *)0x57000083) //BCD date <-- May 06, 2002 SOP
#define BCDMON (*(volatile unsigned char *)0x57000087) //BCD month
#define BCDYEAR (*(volatile unsigned char *)0x5700008b) //BCD year
#else //Little Endian
#define RTCCON (*(volatile unsigned char *)0x57000040) //RTC control
#define TICNT (*(volatile unsigned char *)0x57000044) //Tick time count
#define RTCALM (*(volatile unsigned char *)0x57000050) //RTC alarm control
#define ALMSEC (*(volatile unsigned char *)0x57000054) //Alarm second
#define ALMMIN (*(volatile unsigned char *)0x57000058) //Alarm minute
#define ALMHOUR (*(volatile unsigned char *)0x5700005c) //Alarm Hour
#define ALMDATE (*(volatile unsigned char *)0x57000060) //Alarm day <-- May 06, 2002 SOP
#define ALMMON (*(volatile unsigned char *)0x57000064) //Alarm month
#define ALMYEAR (*(volatile unsigned char *)0x57000068) //Alarm year
#define RTCRST (*(volatile unsigned char *)0x5700006c) //RTC ound eset
#define BCDSEC (*(volatile unsigned char *)0x57000070) //BCD second
#define BCDMIN (*(volatile unsigned char *)0x57000074) //BCD minute
#define BCDHOUR (*(volatile unsigned char *)0x57000078) //BCD hour
#define BCDDATE (*(volatile unsigned char *)0x5700007c) //BCD day <-- May 06, 2002 SOP
#define BCDDAY (*(volatile unsigned char *)0x57000080) //BCD date <-- May 06, 2002 SOP
#define BCDMON (*(volatile unsigned char *)0x57000084) //BCD month
#define BCDYEAR (*(volatile unsigned char *)0x57000088) //BCD year
#endif //RTC
// ADC
#define ADCCON (*(volatile unsigned *)0x58000000) //ADC control
#define ADCTSC (*(volatile unsigned *)0x58000004) //ADC touch screen control
#define ADCDLY (*(volatile unsigned *)0x58000008) //ADC start or Interval Delay
#define ADCDAT0 (*(volatile unsigned *)0x5800000c) //ADC conversion data 0
#define ADCDAT1 (*(volatile unsigned *)0x58000010) //ADC conversion data 1
// SPI
#define SPCON0 (*(volatile unsigned *)0x59000000) //SPI0 control
#define SPSTA0 (*(volatile unsigned *)0x59000004) //SPI0 status
#define SPPIN0 (*(volatile unsigned *)0x59000008) //SPI0 pin control
#define SPPRE0 (*(volatile unsigned *)0x5900000c) //SPI0 baud ate prescaler
#define SPTDAT0 (*(volatile unsigned *)0x59000010) //SPI0 Tx data
#define SPRDAT0 (*(volatile unsigned *)0x59000014) //SPI0 Rx data
#define SPCON1 (*(volatile unsigned *)0x59000020) //SPI1 control
#define SPSTA1 (*(volatile unsigned *)0x59000024) //SPI1 status
#define SPPIN1 (*(volatile unsigned *)0x59000028) //SPI1 pin control
#define SPPRE1 (*(volatile unsigned *)0x5900002c) //SPI1 baud ate prescaler
#define SPTDAT1 (*(volatile unsigned *)0x59000030) //SPI1 Tx data
#define SPRDAT1 (*(volatile unsigned *)0x59000034) //SPI1 Rx data
// SD Interface
#define SDICON (*(volatile unsigned *)0x5a000000) //SDI control
#define SDIPRE (*(volatile unsigned *)0x5a000004) //SDI baud ate prescaler
#define SDICARG (*(volatile unsigned *)0x5a000008) //SDI command argument
#define SDICCON (*(volatile unsigned *)0x5a00000c) //SDI command control
#define SDICSTA (*(volatile unsigned *)0x5a000010) //SDI command status
#define SDIRSP0 (*(volatile unsigned *)0x5a000014) //SDI esponse 0
#define SDIRSP1 (*(volatile unsigned *)0x5a000018) //SDI esponse 1
#define SDIRSP2 (*(volatile unsigned *)0x5a00001c) //SDI esponse 2
#define SDIRSP3 (*(volatile unsigned *)0x5a000020) //SDI esponse 3
#define SDIDTIMER (*(volatile unsigned *)0x5a000024) //SDI data/busy timer
#define SDIBSIZE (*(volatile unsigned *)0x5a000028) //SDI block size
#define SDIDCON (*(volatile unsigned *)0x5a00002c) //SDI data control
#define SDIDCNT (*(volatile unsigned *)0x5a000030) //SDI data emain counter
#define SDIDSTA (*(volatile unsigned *)0x5a000034) //SDI data status
#define SDIFSTA (*(volatile unsigned *)0x5a000038) //SDI FIFO status
#define SDIIMSK (*(volatile unsigned *)0x5a000040) //SDI interrupt mask
#ifdef __BIG_ENDIAN /* edited for 2440A */
#define SDIDAT (*(volatile unsigned *)0x5a00004c)
#else // Little Endian
#define SDIDAT (*(volatile unsigned *)0x5a000040)
#endif //SD Interface
// PENDING BIT
#define INTEINT0 (0)
#define INTEINT1 (1)
#define INTEINT2 (2)
#define INTEINT3 (3)
#define INTEINT4_7 (4)
#define INTEINT8_23 (5)
#define INTNOTUSED6 (6)
#define INTBAT_FLT (7)
#define INTTICK (8)
#define INTWDT (9)
#define INTTIMER0 (10)
#define INTTIMER1 (11)
#define INTTIMER2 (12)
#define INTTIMER3 (13)
#define INTTIMER4 (14)
#define INTUART2 (15)
#define INTLCD (16)
#define INTDMA0 (17)
#define INTDMA1 (18)
#define INTDMA2 (19)
#define INTDMA3 (20)
#define INTSDI (21)
#define INTSPI0 (22)
#define INTUART1 (23)
//#define INTNOTUSED24 (24)
#define INTNIC (24)
#define INTUSBD (25)
#define INTUSBH (26)
#define INTIIC (27)
#define INTUART0 (28)
#define INTSPI1 (29)
#define INTRTC (30)
#define INTADC (31)
#define BIT_ALLMSK (0xffffffff)
#define BIT_SUB_ALLMSK (0x7ff)
#define INTSUB_ADC (10)
#define INTSUB_TC (9)
#define INTSUB_ERR2 (8)
#define INTSUB_TXD2 (7)
#define INTSUB_RXD2 (6)
#define INTSUB_ERR1 (5)
#define INTSUB_TXD1 (4)
#define INTSUB_RXD1 (3)
#define INTSUB_ERR0 (2)
#define INTSUB_TXD0 (1)
#define INTSUB_RXD0 (0)
#define BIT_SUB_ADC (0x1<<10)
#define BIT_SUB_TC (0x1<<9)
#define BIT_SUB_ERR2 (0x1<<8)
#define BIT_SUB_TXD2 (0x1<<7)
#define BIT_SUB_RXD2 (0x1<<6)
#define BIT_SUB_ERR1 (0x1<<5)
#define BIT_SUB_TXD1 (0x1<<4)
#define BIT_SUB_RXD1 (0x1<<3)
#define BIT_SUB_ERR0 (0x1<<2)
#define BIT_SUB_TXD0 (0x1<<1)
#define BIT_SUB_RXD0 (0x1<<0)
#define ClearPending(bit) {SRCPND = bit;INTPND = bit;INTPND;}
//Wait until INTPND is changed for the case that the ISR is very short.
#define INTGLOBAL 32
/*****************************/
/* CPU Mode */
/*****************************/
#define USERMODE 0x10
#define FIQMODE 0x11
#define IRQMODE 0x12
#define SVCMODE 0x13
#define ABORTMODE 0x17
#define UNDEFMODE 0x1b
#define MODEMASK 0x1f
#define NOINT 0xc0
struct rt_hw_register
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r4;
rt_uint32_t r5;
rt_uint32_t r6;
rt_uint32_t r7;
rt_uint32_t r8;
rt_uint32_t r9;
rt_uint32_t r10;
rt_uint32_t fp;
rt_uint32_t ip;
rt_uint32_t sp;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t cpsr;
rt_uint32_t ORIG_r0;
};
#ifdef __cplusplus
}
#endif
/*@}*/
#endif
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