nds.h

RT-Thread是发展中的下一代微内核嵌入式实时操作系统

/*
 * File      : nds.h
 * This file is part of RT-Thread RTOS
 * COPYRIGHT (C) 2006, RT-Thread Develop Team
 *
 * The license and distribution terms for this file may be
 * found in the file LICENSE in this distribution or at
 * http://openlab.rt-thread.com/license/LICENSE
 *
 * Change Logs:
 * Date           Author       Notes
 * 2006-08-17     Vai          Nintendo DS(ARM9TDMI part) version
 */

#ifndef __NDS_H__
#define __NDS_H__

#ifdef __cplusplus
extern "C" {
#endif

#define INTGLOBAL   22
/*
 *  NDS interrupts are controlled by 3 registers in the IO memory space.
 */
#define NDS_IE      0x04000210      /* Interrupt mask */
#define NDS_IF      0x04000214      /* Interrup service */
#define NDS_IME     0x04000208      /* Enable/disable */

#define NDS_INTTIMER0   3
#define NDS_KEYPAD      12
#define NDS_FIFO        18

/*
 * Nintendo DS timer related
 */
/*
 *  *  Timer registers of the NDS.
 *   */
#define NDS_TIMER0_DATA 0x04000100      /* Timer 0 data reg */
#define NDS_TIMER1_DATA 0x04000104      /* Timer 1 data reg */
#define NDS_TIMER2_DATA 0x04000108      /* Timer 2 data reg */
#define NDS_TIMER3_DATA 0x0400010c      /* Timer 3 data reg */

#define NDS_TIMER0_CR   0x04000102      /* Timer 0 control reg */
#define NDS_TIMER1_CR   0x04000106      /* Timer 1 control reg */
#define NDS_TIMER2_CR   0x0400010a      /* Timer 2 control reg */
#define NDS_TIMER3_CR   0x0400010e      /* Timer 3 control reg */

/*
 *  *  Timer control register flags.
 *   */
#define NDS_TCR_CLK     0x0000          /* Use clock freq */
#define NDS_TCR_CLK64   0x0001          /* Use clock/64 freq */
#define NDS_TCR_CLK256  0x0002          /* Use clock/256 freq */
#define NDS_TCR_CLK1024 0x0003          /* Use clock/1024 freq */
#define NDS_TCR_CASCADE 0x0004          /* Cascade timer */
#define NDS_TCR_IRQ     0x0040          /* Generate IRQ */
#define NDS_TCR_ENB     0x0080          /* Enable timer */

/*
 * Video related
 */
#define BIT(n) (1 << (n))

#define POWER_LCD			BIT(0)
#define POWER_2D_A			BIT(1)
#define POWER_MATRIX		BIT(2)
#define POWER_3D_CORE		BIT(3)
#define POWER_2D_B			BIT(9)
#define POWER_SWAP_LCDS		BIT(15)

#define MODE_0_2D      0x10000
#define MODE_1_2D      0x10001
#define MODE_2_2D      0x10002
#define MODE_3_2D      0x10003
#define MODE_4_2D      0x10004
#define MODE_5_2D      0x10005
#define DISPLAY_BG0_ACTIVE    (1 << 8)

#define POWER_ALL_2D     (POWER_LCD |POWER_2D_A |POWER_2D_B)
//!	Enables power to all hardware required for 3D video.
#define POWER_ALL		 (POWER_ALL_2D | POWER_3D_CORE | POWER_MATRIX)

#define POWER_CR        (*(volatile unsigned short *)0x04000304)

// Display control registers
#define DISPLAY_CR      (*(volatile unsigned long *)0x04000000)
#define SUB_DISPLAY_CR  (*(volatile unsigned long *)0x04001000)

#define VRAM_A_CR       (*(volatile unsigned char *)0x04000240)
#define VRAM_C_CR       (*(volatile unsigned char *)0x04000242)
#define VRAM_ENABLE     (1<<7)

#define BG0_CR          (*(volatile unsigned short *)0x04000008)
#define SUB_BG0_CR      (*(volatile unsigned short *)0x04001008)
#define BG_TILE_BASE(base) ((base) << 2)
#define BG_MAP_BASE(base)  ((base) << 8)
#define BG_BMP_BASE(base)  ((base) << 8)

#define BG_PALETTE      ((volatile unsigned short *)0x05000000)
#define SUB_BG_PALETTE  ((volatile unsigned short *)0x05000400)
// macro creates a 15 bit color from 3x5 bit components
#define RGB15(r,g,b)    ((r)|((g)<<5)|((b)<<10))

#define CHAR_BASE_BLOCK(n)    (((n)*0x4000)+0x6000000)
#define CHAR_BASE_BLOCK_SUB(n)      (((n)*0x4000)+0x6200000)
#define SCREEN_BASE_BLOCK(n)  (((n)*0x800)+0x6000000)
#define SCREEN_BASE_BLOCK_SUB(n)    (((n)*0x800)+0x6200000)

/* Key Pad */
#define	REG_KEYCNT		(*(volatile unsigned short *)0x04000132)
#define	REG_KEYINPUT	(*(volatile unsigned short *)0x04000130)

//!	Bit values for the keypad buttons.
typedef enum KEYPAD_BITS {
  KEY_A      = BIT(0),  //!< Keypad A button.
  KEY_B      = BIT(1),  //!< Keypad B button.
  KEY_SELECT = BIT(2),  //!< Keypad SELECT button.
  KEY_START  = BIT(3),  //!< Keypad START button.
  KEY_RIGHT  = BIT(4),  //!< Keypad RIGHT button.
  KEY_LEFT   = BIT(5),  //!< Keypad LEFT button.
  KEY_UP     = BIT(6),  //!< Keypad UP button.
  KEY_DOWN   = BIT(7),  //!< Keypad DOWN button.
  KEY_R      = BIT(8),  //!< Right shoulder button.
  KEY_L      = BIT(9),  //!< Left shoulder button.
  KEY_X      = BIT(10), //!< Keypad X button.
  KEY_Y      = BIT(11), //!< Keypad Y button.
  KEY_TOUCH  = BIT(12), //!< Touchscreen pendown.
  KEY_LID    = BIT(13)  //!< Lid state.
} KEYPAD_BITS;

/*****************************/
/* CPU Mode                  */
/*****************************/
#define USERMODE		0x10
#define FIQMODE			0x11
#define IRQMODE			0x12
#define SVCMODE			0x13
#define ABORTMODE		0x17
#define UNDEFMODE		0x1b
#define MODEMASK		0x1f
#define NOINT			0xc0

struct rt_hw_register
{
	unsigned long r0;
	unsigned long r1;
	unsigned long r2;
	unsigned long r3;
	unsigned long r4;
	unsigned long r5;
	unsigned long r6;
	unsigned long r7;
	unsigned long r8;
	unsigned long r9;
	unsigned long r10;
	unsigned long fp;
	unsigned long ip;
	unsigned long sp;
	unsigned long lr;
	unsigned long pc;
	unsigned long cpsr;
	unsigned long ORIG_r0;
};

#endif /* __NDS_H__ */