usbdrvasm.s

来自「Source code for RFM01 fm radio receiver」· S 代码 · 共 658 行 · 第 1/2 页

    cpi     cnt, 3              ;1
    out     USBRDV_INTR_PENDING, x1;1 clear pending intr and check flag later. SE0 must be over. {,10} into next frame
    brlo    rxDoReturn          ;1 ensure valid packet size, ignore others
    ld      x1, y               ;2 PID
    ldd     x2, y+1             ;2 ADDR + 1 bit endpoint number
    mov     x3, x2              ;1 store for endpoint number
    andi    x2, 0x7f            ;1 mask endpoint number bit
    lds     shift, USBRDV_DeviceId  ;2
    cpi     x1, USBPID_SETUP    ;1
    breq    isSetupOrOut        ;2 -> 19 = {13, 21} from SE0 end
    cpi     x1, USBPID_OUT      ;1
    breq    isSetupOrOut        ;2 -> 22 = {16, 24} from SE0 end / {,24} into next frame
    cpi     x1, USBPID_IN       ;1
    breq    handleIn            ;1
    cpi     x1, USBPID_DATA0    ;1
    breq    isData              ;1
    cpi     x1, USBPID_DATA1    ;1
    brne    rxDoReturn          ;1 ignore all other PIDs
isData:
    lds     x2, USBRDV_CurrentTok   ;2
    tst     x2                  ;1
    breq    rxDoReturn          ;1 for other device or spontaneous data -- ignore
    lds     x1, USBRDV_RxLen        ;2
    cpi     x1, 0               ;1
    brne    sendNakAndReti      ;1 no buffer space available / {30, 38} from SE0 end
    sts     USBRDV_RxLen, cnt       ;2 store received data, swap buffers
    sts     USBRDV_RxToken, x2      ;2
    lds     x1, USBRDV_AppBuf       ;2
    sts     USBRDV_AppBuf, YL       ;2
    sts     USBRDV_InputBuf, x1     ;2 buffers now swapped
    rjmp    sendAckAndReti      ;2 -> {42, 50} from SE0 end

handleIn:                       ; {18, 26} from SE0 end
    cp      x2, shift           ;1 shift contains our device ID
    brne    rxDoReturn          ;1 other device
#if USBRDV_CFG_HAVE_INTRIN_ENDPOINT
    sbrc    x3, 7               ;2
    rjmp    handleIn1           ;0
#endif
    lds     cnt, USBRDV_TxLen       ;2
    cpi     cnt, -1             ;1
    breq    sendNakAndReti      ;1 -> {27, 35} from SE0 end
    ldi     x1, -1              ;1
    sts     USBRDV_TxLen, x1        ;2 buffer is now free
    ldi     YL, lo8(USBRDV_TxBuf)   ;1
    ldi     YH, hi8(USBRDV_TxBuf)   ;1
    rjmp    USBRDV_SendAndReti      ;2 -> {34, 43} from SE0 end

; Comment about when to set USBRDV_TxLen to -1:
; We should set it back to -1 when we receive the ACK from the host. This would
; be simple to implement: One static variable which stores whether the last
; tx was for endpoint 0 or 1 and a compare in the receiver to distinguish the
; ACK. However, we set it back to -1 immediately when we send the package,
; assuming that no error occurs and the host sends an ACK. We save one byte
; RAM this way and avoid potential problems with endless retries. The rest of
; the driver assumes error-free transfers anyway.

otherOutOrSetup:
    clr     x1
    sts     USBRDV_CurrentTok, x1
rxDoReturn:
    pop     x3                  ;2
    pop     YL                  ;2
    pop     YH                  ;2
    rjmp    sofError            ;2

isSetupOrOut:                   ; we must be fast here -- a data package may follow / {,24} into next frame
    cp      x2, shift           ;1 shift contains our device ID
    brne    otherOutOrSetup     ;1 other device -- ignore
    sts     USBRDV_CurrentTok, x1   ;2
#if 0   /* we implement only one rx endpoint */
    sts     USBRDV_RxEndp, x3       ;2 only stored if we may have to distinguish endpoints
#endif
;A transmission can still have data in the output buffer while we receive a
;SETUP package with an IN phase. To avoid that the old data is sent as a reply,
;we abort transmission. ### This mechanism assumes that NO OUT OR SETUP package
;is ever sent to endpoint 1. We would abort transmission for endpoint 0
;in this case.
    ldi     x1, -1              ;1
    sts     USBRDV_MsgLen, x1       ;2
    sts     USBRDV_TxLen, x1        ;2 abort transmission
    pop     x3                  ;2
    pop     YL                  ;2
    in      x1, USBRDV_INTR_PENDING;1
    sbrc    x1, USBRDV_INTR_PENDING_BIT;1 check whether data is already arriving {,41} into next frame
    rjmp    shortcutToStart     ;2 save the pops and pushes -- a new interrupt is aready pending
;If the jump above was not taken, we can be at {,2} into the next frame here
    pop     YH                  ;2
sofError:                       ; error in start of frame -- ignore frame
    ldi     x1, 1<<USBRDV_INTR_PENDING_BIT;1 many int0 events occurred during our processing -- clear pending flag
    out     USBRDV_INTR_PENDING, x1;1
    pop     shift               ;2
    pop     cnt                 ;2
    pop     x2                  ;2
    pop     x1                  ;2
    out     SREG, x1            ;1
    pop     x1                  ;2
    reti                        ;4 -> {,21} into next frame -> up to 3 sync bits missed


sendNakAndReti:                 ; 21 cycles until SOP
    ldi     YL, lo8(USBRDV_NakBuf)  ;1
    ldi     YH, hi8(USBRDV_NakBuf)  ;1
    rjmp    USBRDV_SendToken        ;2

sendAckAndReti:                 ; 19 cycles until SOP
    ldi     YL, lo8(USBRDV_AckBuf)  ;1
    ldi     YH, hi8(USBRDV_AckBuf)  ;1
USBRDV_SendToken:
    ldi     cnt, 2              ;1
;;;;rjmp    USBRDV_SendAndReti      fallthrough

; USB spec says:
; idle = J
; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)

;USBRDV_Send:
;pointer to data in 'Y'
;number of bytes in 'cnt'
;uses: x1...x4, shift, cnt, Y
USBRDV_SendAndReti:             ; SOP starts 16 cycles after call
    push    x4              ;2
    in      x1, USBOUT      ;1
    cbr     x1, USBMASK     ;1 mask out data bits
    ori     x1, USBIDLE     ;1 idle
    out     USBOUT, x1      ;1 prepare idle state
    ldi     x4, USBMASK     ;1 exor mask
    in      x2, USBDDR      ;1
    ori     x2, USBMASK     ;1 set both pins to output
    out     USBDDR, x2      ;1 <-- acquire bus now
; need not init x2 (bitstuff history) because sync starts with 0
    ldi     shift, 0x80     ;1 sync byte is first byte sent
    rjmp    txLoop          ;2 -> 13 + 3 = 16 cycles until SOP

#if USBRDV_CFG_HAVE_INTRIN_ENDPOINT    /* placed here due to relative jump range */
handleIn1:
    lds     cnt, USBRDV_TxLen1
    cpi     cnt, -1
    breq    sendNakAndReti
    ldi     x1, -1
    sts     USBRDV_TxLen1, x1
    ldi     YL, lo8(USBRDV_TxBuf1)
    ldi     YH, hi8(USBRDV_TxBuf1)
    rjmp    USBRDV_SendAndReti
#endif

bitstuff0:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    out     USBOUT, x1      ;1 <-- out
    rjmp    didStuff0       ;2 branch back 2 cycles earlier
bitstuff1:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    sec                     ;1 set carry so that brsh will not jump
    out     USBOUT, x1      ;1 <-- out
    rjmp    didStuff1       ;2 jump back 1 cycle earler
bitstuff2:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    rjmp    didStuff2       ;2 jump back 3 cycles earlier and do out
bitstuff3:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    rjmp    didStuff3       ;2 jump back earlier

txLoop:
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    out     USBOUT, x1      ;1 <-- out
    ror     shift           ;1
    ror     x2              ;1
didStuff0:
    cpi     x2, 0xfc        ;1
    brsh    bitstuff0       ;1
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    ror     shift           ;1
    out     USBOUT, x1      ;1 <-- out
    ror     x2              ;1
    cpi     x2, 0xfc        ;1
didStuff1:
    brsh    bitstuff1       ;1
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    ror     shift           ;1
    ror     x2              ;1
didStuff2:
    out     USBOUT, x1      ;1 <-- out
    cpi     x2, 0xfc        ;1
    brsh    bitstuff2       ;1
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    ror     shift           ;1
    ror     x2              ;1
didStuff3:
    cpi     x2, 0xfc        ;1
    out     USBOUT, x1      ;1 <-- out
    brsh    bitstuff3       ;1
    nop2                    ;2
    ld      x3, y+          ;2
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    out     USBOUT, x1      ;1 <-- out
    ror     shift           ;1
    ror     x2              ;1
didStuff4:
    cpi     x2, 0xfc        ;1
    brsh    bitstuff4       ;1
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    ror     shift           ;1
    out     USBOUT, x1      ;1 <-- out
    ror     x2              ;1
    cpi     x2, 0xfc        ;1
didStuff5:
    brsh    bitstuff5       ;1
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    ror     shift           ;1
    ror     x2              ;1
didStuff6:
    out     USBOUT, x1      ;1 <-- out
    cpi     x2, 0xfc        ;1
    brsh    bitstuff6       ;1
    sbrs    shift, 0        ;1
    eor     x1, x4          ;1
    ror     shift           ;1
    ror     x2              ;1
didStuff7:
    cpi     x2, 0xfc        ;1
    out     USBOUT, x1      ;1 <-- out
    brsh    bitstuff7       ;1
    mov     shift, x3       ;1
    dec     cnt             ;1
    brne    txLoop          ;2 | 1
    cbr     x1, USBMASK     ;1 prepare SE0
    pop     x4              ;2
    out     USBOUT, x1      ;1 <-- out SE0
    ldi     cnt, 4          ;1 two bits = 16 cycles
se0Delay:
    dec     cnt             ;1
    brne    se0Delay        ;2 | 1
    ori     x1, USBIDLE     ;1
    in      x2, USBDDR      ;1
    cbr     x2, USBMASK     ;1 set both pins to input
    out     USBOUT, x1      ;1 <-- out J (idle)
    cbr     x1, USBMASK     ;1 configure no pullup on both pins
    pop     x3              ;2
    pop     YL              ;2
    out     USBDDR, x2      ;1 <-- release bus now
    out     USBOUT, x1      ;1 set pullup state
    pop     YH              ;2
    rjmp    sofError        ;2 [we want to jump to rxDoReturn, but this saves cycles]

bitstuff4:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    out     USBOUT, x1      ;1 <-- out
    rjmp    didStuff4       ;2 jump back 2 cycles earlier
bitstuff5:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    sec                     ;1 set carry so that brsh is not taken
    out     USBOUT, x1      ;1 <-- out
    rjmp    didStuff5       ;2 jump back 1 cycle earlier
bitstuff6:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    rjmp    didStuff6       ;2 jump back 3 cycles earlier and do out there
bitstuff7:                  ;1 (for branch taken)
    eor     x1, x4          ;1
    ldi     x2, 0           ;1
    rjmp    didStuff7       ;2 jump back 4 cycles earlier

; ######################## utility functions ########################

; extern unsigned USBRDV_Crc16(unsigned char *data, unsigned char len);
; data: r24/25
; len: r22
; temp variables:
;   r18: data byte
;   r19: bit counter
;   r20/21: polynomial
;   r23: scratch
;   r24/25: crc-sum
;   r26/27=X: ptr
.global USBRDV_Crc16
USBRDV_Crc16:
    mov     XL, r24
    mov     XH, r25
    ldi     r24, 0xff
    ldi     r25, 0xff
    ldi     r20, lo8(0xa001)
    ldi     r21, hi8(0xa001)
crcByteLoop:
    subi    r22, 1
    brcs    crcReady
    ld      r18, x+
    ldi     r19, 8
crcBitLoop:
    mov     r23, r18
    eor     r23, r24
    lsr     r25
    ror     r24
    lsr     r18
    sbrs    r23, 0
    rjmp    crcNoXor
    eor     r24, r20
    eor     r25, r21
crcNoXor:
    dec     r19
    brne    crcBitLoop
    rjmp    crcByteLoop
crcReady:
    com     r24
    com     r25
    ret

; extern unsigned USBRDV_Crc16Append(unsigned char *data, unsigned char len);
.global USBRDV_Crc16Append
USBRDV_Crc16Append:
    rcall   USBRDV_Crc16
    st      x+, r24
    st      x+, r25
    ret