and5.vst

来自「i need of vhdl code for 32-bit risc proc」· VST 代码 · 共 27 行

ENTITY and5 IS
PORT (
an1 : IN bit_vector(4 downto 0);
an2 : IN bit_vector(4 downto 0);
aout : OUT bit_vector(4 downto 0)
);
END and5;

ARCHITECTURE and5_arch OF and5 IS

COMPONENT  andgate 
PORT ( a2 : IN BIT ;
       b2 : IN BIT ;
       c2 : OUT BIT 
);
END COMPONENT;

BEGIN

and1 : andgate PORT MAP(an1(0),an2(0),aout(0));
and2 : andgate PORT MAP(an1(1),an2(1),aout(1));
and3 : andgate PORT MAP(an1(2),an2(2),aout(2));
and4 : andgate PORT MAP(an1(3),an2(3),aout(3));
and5 : andgate PORT MAP(an1(4),an2(4),aout(4));

END;