buffer1.vbe

i need of vhdl code for 32-bit risc processor

ENTITY buffer1 IS
PORT (
bu1 : IN BIT;
bu2 : OUT BIT
);
END buffer1;

ARCHITECTURE buf1_arch OF buffer1 IS

BEGIN
with bu1 select
bu2 <= b"1" when b"1",
       b"1" when b"0" ;
END;