and8.vst

来自「i need of vhdl code for 32-bit risc proc」· VST 代码 · 共 30 行

ENTITY and8 IS
PORT (
an1 : IN bit_vector(7 downto 0);
an2 : IN bit_vector(7 downto 0);
aout : OUT bit_vector(7 downto 0)
);
END and8;

ARCHITECTURE and8_arch OF and8 IS

COMPONENT  andgate 
PORT ( a2 : IN BIT ;
       b2 : IN BIT ;
       c2 : OUT BIT 
);
END COMPONENT;

BEGIN

and1 : andgate PORT MAP(an1(0),an2(0),aout(0));
and2 : andgate PORT MAP(an1(1),an2(1),aout(1));
and3 : andgate PORT MAP(an1(2),an2(2),aout(2));
and4 : andgate PORT MAP(an1(3),an2(3),aout(3));
and5 : andgate PORT MAP(an1(4),an2(4),aout(4));
and6 : andgate PORT MAP(an1(5),an2(5),aout(5));
and7 : andgate PORT MAP(an1(6),an2(6),aout(6));
and8 : andgate PORT MAP(an1(7),an2(7),aout(7));

END;