📄 processorpattern.pat
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in clock B;in instruction (15 downto 0) B;in readdata (7 downto 0) B;in reset B;out instadd (7 downto 0) B;out memorywriteenable B;out memaddr (7 downto 0) B;out writedata (7 downto 0) B;begin# Resetting the Registers in the processorpres0 : 0 1010000000000000 11111111 1 ?uuuuuuuu ?u ?uuuuuuuu ?uuuuuuuu;pres1 : 1 1010000000000000 11111111 1 ?00000000 ?0 ?00000000 ?00000000;pres2 : 0 1010000000000000 11111111 1 ?00000000 ?0 ?00000000 ?00000000;pres3 : 1 1010000000000000 11111111 1 ?00000000 ?0 ?00000000 ?00000000;# load immediate #111 in Reg.000 LI R1,#111 where R1 is 000 p2 : 0 1010000000000111 10101010 0 ?00000000 ?0 ?00000000 ?00000000;p3 : 1 1010000000000111 10101010 0 ?00000001 ?0 ?00000000 ?00000000;# load immediate #101 in Reg.001p4 : 0 1010000001000101 11100011 0 ?00000001 ?0 ?00000000 ?00000000;p5 : 1 1010000001000101 11100011 0 ?00000010 ?0 ?00000000 ?00000000;# load immediate #010 in Reg.010p6 : 0 1010000010000010 11100111 0 ?00000010 ?0 ?00000000 ?00000000;p7 : 1 1010000010000010 11100111 0 ?00000011 ?0 ?00000111 ?00000111; # load immediate #011 in Reg.011p8 : 0 1010000011000011 10000111 0 ?00000011 ?0 ?00000111 ?00000111;p9 : 1 1010000011000011 10000111 0 ?00000100 ?0 ?00000101 ?00000101;# load immediate #001 in Reg.100p10 : 0 1010000100000001 11100111 0 ?00000100 ?0 ?00000101 ?00000101;p11 : 1 1010000100000001 11100111 0 ?00000101 ?0 ?00000010 ?00000010;# load immediate #100 in Reg.101p12 : 0 1010000101000100 11100111 0 ?00000101 ?0 ?00000010 ?00000010;p13 : 1 1010000101000100 11100111 0 ?00000110 ?0 ?00000011 ?00000011;# load Reg.111 with R[000] LB R1,0(R2) where R1 is 111 and R2 is 000p15 : 0 0011000111000000 11010101 0 ?00000110 ?0 ?00000011 ?00000011;p16 : 1 0011000111000000 11010101 0 ?00000111 ?0 ?00000001 ?00000001;# load Reg.110 with R[001] p16a : 0 0011000110001000 11001110 0 ?00000111 ?0 ?00000001 ?00000001;p16b : 1 0011000110001000 11001110 0 ?00001000 ?0 ?00000100 ?00000100;# store R[000] in m[00000001] SB 0(R2),R1 where R2 is 001 and R1is 000pt1 : 0 0011111000000001 11001100 0 ?00001000 ?0 ?00000100 ?00000100;pt2 : 1 0011111000000001 11001100 0 ?00001001 ?0 ?00000111 ?00000000;# branch to 101 when R[001] is --BEQZ R1,offset R1 is 001 and offset is 00000101pb : 0 0010000000001101 10101100 0 ?00001001 ?0 ?00000111 ?00000000;pb1 : 1 0010000000001101 10101100 0 ?00001010 ?0 ?00000101 ?00000000;--Value in Reg 001 is not zero ..so this brach is not taken# branch to 011 when R[001] is !0pb3 : 0 1011000000001011 11110111 0 ?00001010 ?0 ?00000101 ?00000000;pb4 : 1 1011000000001011 11110111 0 ?00001011 ?1 ?00000001 ?00000111;--Value in Reg 001 is not zero...so this branch is taken and the --current PC ( 1011) is added with the offset o11 and new pc is taken --Also because of the Store before the first branch..the value on R[000] --( 00000111 that was loaded as immediate in the first instruction ) is --stored in Mem location 00000001# store R[010] in m[00000101]p17 : 0 0011111000010101 11000011 0 ?00001011 ?1 ?00000001 ?00000111;p18 : 1 0011111000010101 11000011 0 ?00001100 ?0 ?00001010 ?00000101;# alu operation..does oring of values in R[011] and R[100] and writes in Reg.001-- OR R1,R2,R3 where R1 is 001, R2 is 011 and R3 is 100palu1 : 0 1100101001011100 11000110 0 ?00001100 ?0 ?00001010 ?00000101;palu2 : 1 1100101001011100 11000110 0 ?00001110 ?0 ?00001000 ?00000011;# store R[001] in m[100]p17a : 0 0011111000001100 10000001 0 ?00001110 ?0 ?00001000 ?00000011;p18a : 1 0011111000001100 10000001 0 ?00001111 ?1 ?00000101 ?00000010;--Here value in R[010] is stored Mem location 00000101..the value at Reg 010 --is loaded as immediate in the 3rd instruction and that value is 00000010 # jump to 10111101 J newPC newPC is 10111101pjum : 0 0000000010111101 10100110 0 ?00001111 ?1 ?00000101 ?00000010;pjum : 1 0000000010111101 10100110 0 ?00010000 ?0 ?00000011 ?00000001;# fp addition...add values in 111 and 110 into Reg.010 -- ADDFP R1,R2,R3 ..R1 is 010, R2 is 111 , R3 is 110palufp1 : 0 1101001010111110 10110000 0 ?00010000 ?0 ?00000011 ?00000001;palufp2 : 1 1101001010111110 10110000 0 ?00010001 ?1 ?00000100 ?00000101;--Here value in R[001] is stored Mem location 00000100..the value at Reg 001 --is loaded as immediate in the 2nd instruction and that value is 00000101-- Because of the Jump Instruction..the PC is replaced with the new PC 101111101-- provided in the previous instruction# alu operation..does xoring of values in R[100] and R[011] and writes in Reg.000-- XOR R1,R2,R3 where R1 is 000, R2 is 011 and R3 is 100paluxor1 : 0 1100011000100011 10000001 0 ?00010001 ?1 ?00000100 ?00000101;paluxor2 : 1 1100011000100011 10000001 0 ?10111101 ?0 ?10110001 ?00000101;# alu operation..does anding of value in R[001] with immediate value "00000000" --and writes in Reg.011 ANDI R1,R2,#000 where R1 is 011, R2 is 001paluand1 : 0 1000100011001000 10011111 0 ?10111101 ?0 ?10110001 ?00000101;paluand1 : 1 1000100011001000 10011111 0 ?10111110 ?0 ?11110111 ?11110111;# store R[001] in m[111]pstr1 : 0 0011111000001111 00001011 0 ?10111110 ?0 ?11110111 ?11110111;pstr2 : 1 0011111000001111 00001011 0 ?10111111 ?0 ?00000010 ?00000011;# jump to 10000001pjmp : 0 0000000010000001 10011000 0 ?10111111 ?0 ?00000010 ?00000011;pjmp1 : 1 0000000010000001 10011000 0 ?11000000 ?0 ?00000000 ?00000000;# store R[001] in m[011]pstore1 : 0 0011111000001011 00000111 0 ?11000000 ?0 ?00000000 ?00000000;pstore2 : 1 0011111000001011 00000111 0 ?11000001 ?1 ?00000111 ?00000011;--Here value in R[001] is stored Mem location 00000111..the value at Reg 001 is --loaded as using ALU instruction which perofrmed OR on 00000010 and 0000001 --which were in R[011] and R[100] and that value is 00000011-- Because of the Jump Instruction..the PC is replaced with the new PC 10000001 --provided in the previous instruction# store R[010] in m[110]pstore3 : 0 0011111000010110 10000000 0 ?11000001 ?1 ?00000111 ?00000011;pstore4 : 1 0011111000010110 10000000 0 ?11000010 ?0 ?00001000 ?00000001;# alu immediate ..does ROLI R[110] using imm #111 into Reg.001-- ROLI R1,R2,#111 where R1 is 001, R2 is 110prol1 : 0 1000010001110111 00110011 0 ?11000010 ?0 ?00001000 ?00000001;prol2 : 1 1000010001110111 00110011 0 ?11000011 ?1 ?00000011 ?00000011;--The Value in Reg[001] is written in Mem location 011..# branch to 010 when R[011] is !0bneqz1 : 0 1011000000011010 01110000 0 ?11000011 ?1 ?00000011 ?00000011;bneqz2 : 1 1011000000011010 01110000 0 ?11000100 ?1 ?00000110 ?11110111;--The value in R[011] is checked for non-zero to take branch. --The value in that reg is loaded using an ALU operation which did ANDing of -- value in R[001] with Immediate#000000 and hence hence the result was zero--..so this branch is not taken..--ALso the output of FP addition that was loaded in R[010] is used now to store in --mem location00000110 because of the Store instruction given above...FP addition --used the values 10101100 and 11110111# branch to 100 when R[011] is 0beqz1 : 0 0010000000011100 00111000 0 ?11000100 ?1 ?00000110 ?11110111;beqz2 : 1 0010000000011100 00111000 0 ?11000101 ?0 ?11101111 ?00000111;--This instruction checks for zero value in that reg..so the condition is --satisfied and branch is taken and the PC is added with the immediate value --00000100 and PC is updated# load Reg.101 with M[1+R[010] ]loaddisp : 0 0011000101001010 00100000 0 ?11000101 ?0 ?11101111 ?00000111;loaddis2 : 1 0011000101001010 00100000 0 ?11000110 ?0 ?00000010 ?00000010;# load Reg.110 with M[3+R[010] ]loaddis3 : 0 0011000110011010 00100111 0 ?11000110 ?0 ?00000010 ?00000010;loaddis4 : 1 0011000110011010 00100111 0 ?11001001 ?0 ?00000100 ?00000100;--The Regs 110 and 101 are loaded to perform subtraction operation# nopnop : 0 0010010000000000 10111001 0 ?11001001 ?0 ?00000100 ?00000100;nop : 1 0010010000000000 10111001 0 ?11001010 ?0 ?00000101 ?00000010;nop : 0 0010010000000000 00100000 0 ?11001010 ?0 ?00000101 ?00000010;nop : 1 0010010000000000 00100000 0 ?11001011 ?0 ?00000010 ?00000010;nop : 0 0010010000000000 00111000 0 ?11001011 ?0 ?00000010 ?00000010;nop : 1 0010010000000000 00111000 0 ?11001100 ?0 ?00000010 ?00000000;nop : 0 0010010000000000 10100000 0 ?11001100 ?0 ?00000010 ?00000000;nop : 1 0010010000000000 10100000 0 ?11001101 ?0 ?00000010 ?00000000;# fp subtraction of R[101] with R[110] into Reg.000fpsubt1 : 0 1101010000101110 01011000 0 ?11001101 ?0 ?00000010 ?00000000;fpsubt2 : 1 1101010000101110 01011000 0 ?11001110 ?0 ?00000010 ?00000000;# store R[001] in m[100]st1 : 0 0011111000001100 00111000 0 ?11001110 ?0 ?00000010 ?00000000;st2 : 1 0011111000001100 00111000 0 ?11001111 ?0 ?00000010 ?00000000;# store R[101] in m[110]st4 : 0 0011111000101110 01111000 0 ?11001111 ?0 ?00000010 ?00000000;st5 : 1 0011111000101110 01111000 0 ?11010000 ?0 ?00110000 ?00111000;# jump to 10011101pjmp3 : 0 0000000010011101 10011000 0 ?11010000 ?0 ?00110000 ?00111000;pjmp4 : 1 0000000010011101 10011000 0 ?11010001 ?1 ?00000100 ?11101111;--Here the value at R[001] is stored in mem location M[0000100].--.the value at R[001] is loaded using the ROL immediate ALU operation....# nopnop : 0 0010010000000000 00111000 0 ?11010001 ?1 ?00000100 ?11101111;nop : 1 0010010000000000 00100000 0 ?11010010 ?1 ?00000110 ?00100000;-- Here the value in R[110] is stored in Mem location [00000110]..--the value in R[110] was earlier loaded using memory access..--the data faked was 0010000# nopnop : 0 0010010000000000 00100000 0 ?11010010 ?1 ?00000110 ?00100000;nop : 1 0010010000000000 00100000 0 ?10011101 ?0 ?00000101 ?00000101;# store R[000] in m[010]st12 : 0 0011111000000010 10111000 0 ?10011101 ?0 ?00000101 ?00000101;st22 : 1 0011111000000010 10111000 0 ?10011110 ?0 ?00110000 ?00000000;# nopnop : 0 0010010000000000 00111000 0 ?10011110 ?0 ?00110000 ?00000000;nop : 1 0010010000000000 00111000 0 ?10011111 ?0 ?00110000 ?00000000;nop : 0 0010010000000000 00100000 0 ?10011111 ?0 ?00110000 ?00000000;nop : 1 0010010000000000 00100000 0 ?10100000 ?1 ?00000010 ?00110000;-- Here the value in R[000] is stored in MemLocation[00000010]..the reg 000 --was loaded using FP Subtraction operation of the values in R[101] and R[110] --..the values used forsubtraction were 00111000 and 00111000...--now the result that was loaded in R[000] is stored in mem location 00000010nop : 0 0010010000000000 00111000 0 ?10100000 ?1 ?00000010 ?00110000;nop : 1 0010010000000000 00111000 0 ?10100001 ?0 ?00110000 ?00000000;end;
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