alures.pat

i need of vhdl code for 32-bit risc processor

-- description generated by Pat driver v107
--			date : Wed Dec  5 16:40:47 2001


--		sequence : alu

-- input / output list :
in       al1 (7 downto 0) B;
in       al2 (7 downto 0) B;
in       sel (3 downto 0) B;
out      alout (7 downto 0) B;

begin

-- Pattern description :

--                                 a       a       s    a        
--                                 l       l       e    l        
--                                 1       2       l    o        
--                                                      u        
--                                                      t        


#  patterns for op 000 : for add
pat06_add                        : 10110110110001110000?01111101;
pat05_add                        : 11000111111110110000?11000010;
pat04_add                        : 11011011010110100000?00110101;
pat03_add                        : 10111101010110100000?00010111;
pat02_add                        : 11011101111001110000?11000100;
pat00_add                        : 00000000000000000000?00000000;
pat01_add                        : 11111111111111110000?11111110;

#  patterns for op 001 : for sub
pat07_sub                        : 11111111111111110001?00000000;
pat4_sub                         : 00000010000001000001?11111110;
pat2_sub                         : 11111111101010100001?01010101;
pat1_sub                         : 01001001000100100001?00110111;

#  patterns for op 010 : for rol
p_0rol                           : 11111111000000000010?11111111;
p_1rol                           : 01010101001100010010?10101010;
p_2rol                           : 11011001001010110010?00111011;
p_3rol                           : 11001110001111110010?10011101;
p_4rol                           : 11000111000110100010?11110001;
p_5rol                           : 10100011011101000010?00111010;

#  patterns for op 011 : for xor
pat17_xor                        : 00000000000000000011?00000000;
pat18_xor                        : 11111111111111110011?00000000;
pat21_xor                        : 11011011010110100011?10000001;
pat22_xor                        : 11000111111110110011?00111100;
pat4_xor                         : 10101010010101010011?11111111;
pat5_xor                         : 10101110010101110011?11111001;
pat6_xor                         : 01110111100111100011?11101001;
pat6_xor                         : 11011011101011110011?01110100;
pat7_xor                         : 11010111111010110011?00111100;

#  patterns for op 100 : for and
pat24_and                        : 01010101010101010100?01010101;
pat22_and                        : 11000111111110110100?11000011;
pat4_and                         : 10101010010101010100?00000000;
pat5_and                         : 10101110010101110100?00000110;
pat6_and                         : 01110111100111100100?00010110;
pat6_and                         : 11011011101011110100?10001011;
pat7_and                         : 11010111111010110100?11000011;

#  patterns for op 101 : for or
pat25_or                         : 01010101010101010101?01010101;
pat22_or                         : 11000111111110110101?11111111;
pat4_or                          : 10101010010101010101?11111111;
pat5_or                          : 10101110010101110101?11111111;
pat6_or                          : 01110111100111100101?11111111;
pat6_or                          : 11011011101011110101?11111111;
pat7_or                          : 11010111111010110101?11111111;
pat8_or                          : 10001101000011010101?10001101;

#  patterns for op 111 : for fwd
p1_fwd                           : 00111111100010000111?00111111;

#  patterns for op 1000 : for fpadd
p1_fp                            : 11001001001111111000?10110010;

end;