aluearlier_1.pat

i need of vhdl code for 32-bit risc processor

in al1 (7 downto 0) B;
in al2 (7 downto 0) B;
in sel (2 to 0) B;
out alout (7 downto 0) B;

begin

# Patterns for OP 000 : for ADD
pat06_add : 10110110 11000111 000 ?01111101;
pat05_add : 11000111 11111011 000 ?11000010;
pat04_add : 11011011 01011010 000 ?00110101;
pat03_add : 10111101 01011010 000 ?00010111;
pat02_add : 11011101 11100111 000 ?11000100;
pat00_add : 00000000 00000000 000 ?00000000;
pat01_add : 11111111 11111111 000 ?11111110;

# Patterns for OP 001 : for SUB
pat07_sub : 11111111 11111111 001 ?00000000;
pat4_sub  : 00000010 00000100 001 ?11111110;
pat2_sub  : 11111111 10101010 001 ?01010101;
pat1_sub  : 01001001 00010010 001 ?00110111;

# Patterns for OP 010 : for ROL
p_0rol    : 11111111 00000000 010 ?11111111;
p_1rol    : 01010101 00110001 010 ?10101010;
p_2rol    : 11011001 00101011 010 ?00111011;
p_3rol    : 11001110 00111111 010 ?10011101;
p_4rol    : 11000111 00011010 010 ?11110001;
p_5rol    : 10100011 01110100 010 ?00111010;

# Patterns for OP 011 : for XOR
pat17_xor : 00000000 00000000 011 ?00000000;
pat18_xor : 11111111 11111111 011 ?00000000;
pat21_xor : 11011011 01011010 011 ?10000001;
pat22_xor : 11000111 11111011 011 ?00111100;
pat4_xor  : 10101010 01010101 011 ?11111111;
pat5_xor  : 10101110 01010111 011 ?11111001;
pat6_xor  : 01110111 10011110 011 ?11101001;
pat6_xor  : 11011011 10101111 011 ?01110100;
pat7_xor  : 11010111 11101011 011 ?00111100;

# Patterns for OP 100 : for AND
pat24_and : 01010101 01010101 100 ?01010101;
pat22_and : 11000111 11111011 100 ?11000011;
pat4_and  : 10101010 01010101 100 ?00000000;
pat5_and  : 10101110 01010111 100 ?00000110;
pat6_and  : 01110111 10011110 100 ?00010110;
pat6_and  : 11011011 10101111 100 ?10001011;
pat7_and  : 11010111 11101011 100 ?11000011;

# Patterns for OP 101 : for OR
pat25_or  : 01010101 01010101 101 ?01010101;
pat22_or  : 11000111 11111011 101 ?11111111;
pat4_or   : 10101010 01010101 101 ?11111111;
pat5_or   : 10101110 01010111 101 ?11111111;
pat6_or   : 01110111 10011110 101 ?11111111;
pat6_or   : 11011011 10101111 101 ?11111111;
pat7_or   : 11010111 11101011 101 ?11111111;
pat8_or   : 10001101 00001101 101 ?10001101;

# Patterns for OP 111 : for fwd
p1_fwd    : 00111111 10001000 111 ?10001000; 
end;