processorres.pat

i need of vhdl code for 32-bit risc processor

-- description generated by Pat driver v107
--			date : Wed Jan  9 11:34:54 2002


--		sequence : processorpattern

-- input / output list :
in       clock B;
in       instruction (15 downto 0) B;
in       readdata (7 downto 0) B;
in       reset B;
out      instadd (7 downto 0) B;
out      memorywriteenable B;
out      memaddr (7 downto 0) B;
out      writedata (7 downto 0) B;

begin

-- Pattern description :

--                                 ci               r       r i        m m        w        
--                                 ln               e       e n        e e        r        
--                                 os               a       s s        m m        i        
--                                 ct               d       e t        o a        t        
--                                 kr               d       t a        r d        e        
--                                  u               a         d        y d        d        
--                                  c               t         d        w r        a        
--                                  t               a                  r          t        
--                                  i                                  i          a        
--                                  o                                  t                   
--                                  n                                  e                   
--                                                                     e                   
--                                                                     n                   
--                                                                     a                   
--                                                                     b                   
--                                                                     l                   
--                                                                     e                   


#  resetting the registers in the processor
pres0                            : 01010000000000000111111111?uuuuuuuu?u?uuuuuuuu?uuuuuuuu;
pres1                            : 11010000000000000111111111?00000000?0?00000000?00000000;
pres2                            : 01010000000000000111111111?00000000?0?00000000?00000000;
pres3                            : 11010000000000000111111111?00000000?0?00000000?00000000;

#   load immediate #111 in reg.000		li r1,#111     where r1 is 000       
p2                               : 01010000000000111101010100?00000000?0?00000000?00000000;
p3                               : 11010000000000111101010100?00000001?0?00000000?00000000;

#   load immediate #101 in reg.001
p4                               : 01010000001000101111000110?00000001?0?00000000?00000000;
p5                               : 11010000001000101111000110?00000010?0?00000000?00000000;

#   load immediate #010 in reg.010
p6                               : 01010000010000010111001110?00000010?0?00000000?00000000;
p7                               : 11010000010000010111001110?00000011?0?00000111?00000111;

#   load immediate #011 in reg.011
p8                               : 01010000011000011100001110?00000011?0?00000111?00000111;
p9                               : 11010000011000011100001110?00000100?0?00000101?00000101;

#   load immediate #001 in reg.100
p10                              : 01010000100000001111001110?00000100?0?00000101?00000101;
p11                              : 11010000100000001111001110?00000101?0?00000010?00000010;

#   load immediate #100 in reg.101
p12                              : 01010000101000100111001110?00000101?0?00000010?00000010;
p13                              : 11010000101000100111001110?00000110?0?00000011?00000011;

#   load reg.111 with r[000]	lb r1,0(r2)	where r1 is 111 and r2 is 000
p15                              : 00011000111000000110101010?00000110?0?00000011?00000011;
p16                              : 10011000111000000110101010?00000111?0?00000001?00000001;

#   load reg.110 with r[001] 
p16a                             : 00011000110001000110011100?00000111?0?00000001?00000001;
p16b                             : 10011000110001000110011100?00001000?0?00000100?00000100;

#   store r[000] in m[00000001]	sb 0(r2),r1	where r2 is 001 and r1is 000
pt1                              : 00011111000000001110011000?00001000?0?00000100?00000100;
pt2                              : 10011111000000001110011000?00001001?0?00000111?00000000;

#   branch to 101 when r[001] is 
pb                               : 00010000000001101101011000?00001001?0?00000111?00000000;
pb1                              : 10010000000001101101011000?00001010?0?00000101?00000000;

#   branch to 011 when r[001] is !0
pb3                              : 01011000000001011111101110?00001010?0?00000101?00000000;
pb4                              : 11011000000001011111101110?00001011?1?00000001?00000111;

#   store r[010] in m[00000101]
p17                              : 00011111000010101110000110?00001011?1?00000001?00000111;
p18                              : 10011111000010101110000110?00001100?0?00001010?00000101;

#   alu operation..does oring of values in r[011] and r[100] and writes in reg.001
palu1                            : 01100101001011100110001100?00001100?0?00001010?00000101;
palu2                            : 11100101001011100110001100?00001110?0?00001000?00000011;

#   store r[001] in m[100]
p17a                             : 00011111000001100100000010?00001110?0?00001000?00000011;
p18a                             : 10011111000001100100000010?00001111?1?00000101?00000010;

#    jump to 10111101				j newpc		newpc is 10111101
pjum                             : 00000000010111101101001100?00001111?1?00000101?00000010;
pjum                             : 10000000010111101101001100?00010000?0?00000011?00000001;

#    fp addition...add values in 111 and 110 into reg.010 
palufp1                          : 01101001010111110101100000?00010000?0?00000011?00000001;
palufp2                          : 11101001010111110101100000?00010001?1?00000100?00000101;

#   alu operation..does xoring of values in r[100] and r[011] and writes in reg.000
paluxor1                         : 01100011000100011100000010?00010001?1?00000100?00000101;
paluxor2                         : 11100011000100011100000010?10111101?0?10110001?00000101;

#   alu operation..does anding of value in r[001] with immediate value "00000000"  
paluand1                         : 01000100011001000100111110?10111101?0?10110001?00000101;
paluand1                         : 11000100011001000100111110?10111110?0?11110111?11110111;

#   store r[001] in m[111]
pstr1                            : 00011111000001111000010110?10111110?0?11110111?11110111;
pstr2                            : 10011111000001111000010110?10111111?0?00000010?00000011;

#   jump to 10000001
pjmp                             : 00000000010000001100110000?10111111?0?00000010?00000011;
pjmp1                            : 10000000010000001100110000?11000000?0?00000000?00000000;

#   store r[001] in m[011]
pstore1                          : 00011111000001011000001110?11000000?0?00000000?00000000;
pstore2                          : 10011111000001011000001110?11000001?1?00000111?00000011;

#   store r[010] in m[110]
pstore3                          : 00011111000010110100000000?11000001?1?00000111?00000011;
pstore4                          : 10011111000010110100000000?11000010?0?00001000?00000001;

#   alu immediate ..does roli r[110] using imm #111 into reg.001
prol1                            : 01000010001110111001100110?11000010?0?00001000?00000001;
prol2                            : 11000010001110111001100110?11000011?1?00000011?00000011;

#   branch to 010 when r[011] is !0
bneqz1                           : 01011000000011010011100000?11000011?1?00000011?00000011;
bneqz2                           : 11011000000011010011100000?11000100?1?00000110?11110111;

#   branch to 100 when r[011] is 0
beqz1                            : 00010000000011100001110000?11000100?1?00000110?11110111;
beqz2                            : 10010000000011100001110000?11000101?0?11101111?00000111;

#   load reg.101 with m[1+r[010] ]
loaddisp                         : 00011000101001010001000000?11000101?0?11101111?00000111;
loaddis2                         : 10011000101001010001000000?11000110?0?00000010?00000010;

#   load reg.110 with m[3+r[010] ]
loaddis3                         : 00011000110011010001001110?11000110?0?00000010?00000010;
loaddis4                         : 10011000110011010001001110?11001001?0?00000100?00000100;

#   nop
nop                              : 00010010000000000101110010?11001001?0?00000100?00000100;
nop                              : 10010010000000000101110010?11001010?0?00000101?00000010;
nop                              : 00010010000000000001000000?11001010?0?00000101?00000010;
nop                              : 10010010000000000001000000?11001011?0?00000010?00000010;
nop                              : 00010010000000000001110000?11001011?0?00000010?00000010;
nop                              : 10010010000000000001110000?11001100?0?00000010?00000000;
nop                              : 00010010000000000101000000?11001100?0?00000010?00000000;
nop                              : 10010010000000000101000000?11001101?0?00000010?00000000;

#   fp subtraction of r[101] with r[110] into reg.000
fpsubt1                          : 01101010000101110010110000?11001101?0?00000010?00000000;
fpsubt2                          : 11101010000101110010110000?11001110?0?00000010?00000000;

#   store r[001] in m[100]
st1                              : 00011111000001100001110000?11001110?0?00000010?00000000;
st2                              : 10011111000001100001110000?11001111?0?00000010?00000000;

#   store r[101] in m[110]
st4                              : 00011111000101110011110000?11001111?0?00000010?00000000;
st5                              : 10011111000101110011110000?11010000?0?00110000?00111000;

#   jump to 10011101
pjmp3                            : 00000000010011101100110000?11010000?0?00110000?00111000;
pjmp4                            : 10000000010011101100110000?11010001?1?00000100?11101111;

#   nop
nop                              : 00010010000000000001110000?11010001?1?00000100?11101111;
nop                              : 10010010000000000001000000?11010010?1?00000110?00100000;

#   nop
nop                              : 00010010000000000001000000?11010010?1?00000110?00100000;
nop                              : 10010010000000000001000000?10011101?0?00000101?00000101;

#   store r[000] in m[010]
st12                             : 00011111000000010101110000?10011101?0?00000101?00000101;
st22                             : 10011111000000010101110000?10011110?0?00110000?00000000;

#   nop
nop                              : 00010010000000000001110000?10011110?0?00110000?00000000;
nop                              : 10010010000000000001110000?10011111?0?00110000?00000000;
nop                              : 00010010000000000001000000?10011111?0?00110000?00000000;
nop                              : 10010010000000000001000000?10100000?1?00000010?00110000;
nop                              : 00010010000000000001110000?10100000?1?00000010?00110000;
nop                              : 10010010000000000001110000?10100001?0?00110000?00000000;

end;