signdecide.vbe

来自「i need of vhdl code for 32-bit risc proc」· VBE 代码 · 共 16 行

ENTITY signdecide IS
PORT(
g : IN BIT;
f : IN BIT;
sone : IN BIT;
stwo : IN BIT;
signres : OUT BIT
);
END signdecide;

ARCHITECTURE signdecide_arch OF signdecide IS
begin
signres <= ( g AND NOT(sone) AND stwo ) OR ( NOT(g) AND NOT(f) AND sone AND NOT(stwo) ) OR ( NOT(g) AND f AND NOT(sone) AND stwo ) OR ( sone AND stwo );
end;