fb_block.vbe

来自「i need of vhdl code for 32-bit risc proc」· VBE 代码 · 共 27 行

ENTITY fb_block IS
PORT (
gij : IN BIT;
pij : IN BIT;
cib : IN BIT;
gj1k : IN BIT;
pj1k : IN BIT;
cio : OUT BIT;
cj1 : OUT BIT;
gik : OUT BIT;
pik : OUT BIT
);
END fb_block ;

ARCHITECTURE fbblock_arch OF fb_block IS

BEGIN

-- Behavioral Description of the the block that Computes G ( generate bit ) and P ( carry bit )

cj1 <= (gij OR ( pij AND cib ));
cio <= cib;
pik <= pij AND pj1k;
gik <= (gj1k OR (pj1k AND gij ));

END;