2410init.s

S3C2410学习的基础资料 大部分实验源码及工程

IsrIRQ  
    sub     sp,sp,#4       ;reserved for PC
    stmfd   sp!,{r8-r9}   
;INTOFFSET->Indicate the IRQ Interrupt Request Source    
    ldr     r9,=INTOFFSET
    ldr     r9,[r9]
    ldr     r8,=HandleEINT0
    add     r8,r8,r9,lsl #2
    ldr     r8,[r8]
    str     r8,[sp,#8]
    ldmfd   sp!,{r8-r9,pc}

	
;=======================
; ENTRY 初始化代码的入口 
;=======================
ResetHandler
    ldr r0,=WTCON           ;关闭开门狗 
    ldr r1,=0x0         
    str r1,[r0]

    ldr r0,=INTMSK
    ldr r1,=0xffffffff      ;关闭所有中断
    str r1,[r0]

    ldr r0,=INTSUBMSK
    ldr r1,=0x7ff           ;关闭所有子中断
    str r1,[r0]

    [ {FALSE}
        ; rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4);    
        ; Led_Display
    ldr r0,=GPFCON
    ldr r1,=0x5500      
    str r1,[r0]
    ldr r0,=GPFDAT
    ldr r1,=0x10
    str r1,[r0]
    ]

    ;To reduce PLL lock time, adjust the LOCKTIME register. 
    ldr r0,=LOCKTIME
    ldr r1,=0xffffff
    str r1,[r0]
        
        [ PLL_ON_START
    ;Configure MPLL
    ldr r0,=MPLLCON          
    ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV)  ;Fin=12MHz,Fout=50MHz
    str r1,[r0]
    ]

    ;Check if the boot is caused by the wake-up from POWER_OFF mode.
    ldr r1,=GSTATUS2
    ldr r0,[r1]
    tst r0,#0x2
        ;In case of the wake-up from POWER_OFF mode, go to POWER_OFF_WAKEUP handler. 
    bne WAKEUP_POWER_OFF

    EXPORT StartPointAfterPowerOffWakeUp
StartPointAfterPowerOffWakeUp

    ;设置存储器控制寄存器器
    ldr r0,=SMRDATA
    ldr r1,=BWSCON      ;BWSCON Address=0x48000000
    add r2, r0, #52     ;End address of SMRDATA
0       
    ldr r3, [r0], #4    
    str r3, [r1], #4    
    cmp r2, r0      
    bne %B0
    
        ;Initialize stacks
    bl  InitStacks
    
    ; Setup IRQ handler
    ldr r0,=HandleIRQ       ;This routine is needed
    ldr r1,=IsrIRQ          ;if there isn't 'subs pc,lr,#4 at 0x18, 0x1c
    str r1,[r0]

    ;Copy and paste RW data/zero initialized data
    ldr r0, =|Image$$RO$$Limit|     ; Get pointer to ROM data
    ldr r1, =|Image$$RW$$Base|      ; and RAM copy
    ldr r3, =|Image$$ZI$$Base|  
    
    ;Zero init base => top of initialised data
    cmp r0, r1      ; Check that they are different
    beq %F2
1       
    cmp r1, r3      ; Copy init data
    ldrcc   r2, [r0], #4    ;--> LDRCC r2, [r0] + ADD r0, r0, #4         
    strcc   r2, [r1], #4    ;--> STRCC r2, [r1] + ADD r1, r1, #4
    bcc %B1
2       
    ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segment
    mov r2, #0
3       
    cmp     r3, r1      ; Zero init
    strcc   r2, [r3], #4
    bcc     %B3

    ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;        bl  MMU_Init
        
;        ldr r12,=0x00000438
        
;        MRC     p15, 0, r0, c1, c0, 0       ; read CP15 register 1 into r0
;        BIC     r0, r0, #(0x1  <<12)        ; ensure I Cache disabled
;        BIC     r0, r0, #(0x1  <<2)         ; ensure D Cache disabled
;        ORR     r0, r0, #0x1                ; enable MMU before scatter loading
;        MCR     p15, 0, r0, c1, c0, 0       ; write CP15 register 1
 
; 		LDR  PC,=0x00000438
;        bx r12
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;     

    [ :LNOT:THUMBCODE
    
        bl  Main        ;Don't use main() because ......
        b   .                       
    ]

    [ THUMBCODE         ;for start-up code for Thumb mode
        orr lr,pc,#1
        bx  lr
        CODE16
        bl  Main        ;Don't use main() because ......
        b   .
        CODE32
    ]


;堆栈初始化函数
InitStacks
    ;Don't use DRAM,such as stmfd,ldmfd......
    ;SVCstack is initialized before
    ;Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'
    mrs r0,cpsr
    bic r0,r0,#MODEMASK
    orr r1,r0,#UNDEFMODE|NOINT
    msr cpsr_cxsf,r1                ;未定义指令中断模式
    ldr sp,=UndefStack
    
    orr r1,r0,#ABORTMODE|NOINT
    msr cpsr_cxsf,r1                ;数据访问中止模式
    ldr sp,=AbortStack

    orr r1,r0,#IRQMODE|NOINT
    msr cpsr_cxsf,r1                ;外部中断模式
    ldr sp,=IRQStack
    
    orr r1,r0,#FIQMODE|NOINT
    msr cpsr_cxsf,r1                ;快速中断模式
    ldr sp,=FIQStack

    bic r0,r0,#MODEMASK|NOINT
    orr r1,r0,#SVCMODE
    msr cpsr_cxsf,r1                ;快速中断模式
    ldr sp,=SVCStack
    
    ;USER mode has not be initialized.
    
    mov pc,lr 
    ;The LR register won't be valid if the current mode is not SVC mode.
    

    LTORG ;声明一个数据缓冲池的开始

;配置存储器寄存器的数据区
SMRDATA DATA;在代码中使用数据
; Memory configuration should be optimized for best performance 
; The following parameter is not optimized.                     
; Memory access cycle parameter strategy
; 1) The memory settings is  safe parameters even at HCLK=75Mhz.
; 2) SDRAM refresh period is for HCLK=75Mhz. 
	;DCD分配一段字的内存单元，并用指定的数据初始化
    DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
    DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))   ;GCS0
    DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))   ;GCS1 
    DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))   ;GCS2
    DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))   ;GCS3
    DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))   ;GCS4
    DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))   ;GCS5
    DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))    ;GCS6
    DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))    ;GCS7
;   DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)    ;Tchr not used bit
    DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+REFCNT)       



;   DCD 0x32            ;SCLK power saving mode, ARM core burst disable, BANKSIZE 128M/128M
    DCD 0xb2            ;SCLK power saving mode, ARM core burst enable , BANKSIZE 128M/128M - 11/29/2002

    DCD 0x30            ;MRSR6 CL=3clk
    DCD 0x30            ;MRSR7
;   DCD 0x20            ;MRSR6 CL=2clk
;   DCD 0x20            ;MRSR7

    ALIGN;对齐补0使当前位置满足一定的方式


    AREA RamData, DATA, READWRITE

    ^   _ISR_STARTADDRESS
HandleReset     #   4
HandleUndef     #   4
HandleSWI       #   4
HandlePabort    #   4
HandleDabort    #   4
HandleReserved  #   4
HandleIRQ       #   4
HandleFIQ       #   4

;Don't use the label 'IntVectorTable'',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
HandleEINT0     #   4
HandleEINT1     #   4
HandleEINT2     #   4
HandleEINT3     #   4
HandleEINT4_7   #   4
HandleEINT8_23  #   4
HandleRSV6      #   4
HandleBATFLT    #   4
HandleTICK      #   4
HandleWDT       #   4
HandleTIMER0    #   4
HandleTIMER1    #   4
HandleTIMER2    #   4
HandleTIMER3    #   4
HandleTIMER4    #   4
HandleUART2     #   4
HandleLCD       #   4
HandleDMA0      #   4
HandleDMA1      #   4
HandleDMA2      #   4
HandleDMA3      #   4
HandleMMC       #   4
HandleSPI0      #   4
HandleUART1     #   4
HandleRSV24     #   4
HandleUSBD      #   4
HandleUSBH      #   4
HandleIIC       #   4
HandleUART0     #   4
HandleSPI1      #   4
HandleRTC       #   4
HandleADC       #   4

    END