int_pid.s

S3C2410学习的基础资料 大部分实验源码及工程

;/*                                                                       */
;/* FUNCTION                                                              */
;/*                                                                       */
;/*      INT_Reserved                                                     */
;/*                                                                       */
;/* DESCRIPTION                                                           */
;/*                                                                       */
;/*     This is a stub for the Reserved Interrupt                         */
;/*                                                                       */
;/*                                                                       */
;/* CALLED BY                                                             */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* CALLS                                                                 */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* INPUTS                                                                */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* OUTPUTS                                                               */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* HISTORY                                                               */
;/*                                                                       */
;/*         NAME            DATE                    REMARKS               */
;/*     D. Driscoll       5-10-2001            Implemented stub           */
;/*                                                                       */
;/*************************************************************************/
    EXPORT  INT_Reserved
INT_Reserved
    B        INT_Reserved

;/*************************************************************************/
;/*                                                                       */
;/* FUNCTION                                                              */
;/*                                                                       */
;/*      INT_IRQ                                                          */
;/*                                                                       */
;/* DESCRIPTION                                                           */
;/*                                                                       */
;/*      This function handles all IRQ calls.  This IRQ Handler will be   */
;/*      called from the IRQ vector in the Vector Table installed by      */
;/*      INT_Install_Vector_Table                                         */
;/*                                                                       */
;/*      This function uses two tables to service IRQs.  The              */
;/*      INT_IRQ_Priority sets what order the pending register will       */
;/*      be checked for interrupts (ie if more than one interrupt         */
;/*      pending, which one is serviced first).                           */
;/*                                                                       */
;/*      INT_IRQ_Vectors contains the address which each interrupt        */
;/*      will branch to in order to service that particular interrupt.    */
;/*                                                                       */
;/*                                                                       */
;/* CALLED BY                                                             */
;/*      ExceptionHandlerTable                                            */
;/*                                                                       */
;/* CALLS                                                                 */
;/*                                                                       */
;/*                                                                       */
;/* INPUTS                                                                */
;/*                                                                       */
;/*                                                                       */
;/* OUTPUTS                                                               */
;/*                                                                       */
;/*      vector (in register R0)                                          */
;/*                                                                       */
;/* HISTORY                                                               */
;/*                                                                       */
;/*         NAME            DATE                    REMARKS               */
;/*      D. Driscoll      4-18-2001     Changed interrupt handling to     */
;/*                                     conform to NUCLEUS API (uses      */
;/*                                     NU_Dispatch_LISR calls)           */
;/*                                                                       */
;/*************************************************************************/
    EXPORT  INT_IRQ
INT_IRQ
;/* This Code is used to correctly handle interrupts and
;   is necessary due to the nature of the ARM7 architecture  */

;    STMDB   sp!, {r1}
;    MRS     r1, SPSR
;    TST     r1, #I_BIT
;    LDMIA   sp!, {r1}
;    SUBNES  pc,lr,#4
;
;/* End ARM7 Fix */

    STMDB   sp!,{r0-r4}                 ; Save r0-r4 on temporary IRQ stack

    SUB     lr,lr,#4                    ; Adjust IRQ return address

;    LDR     r3, =IRQ_ENABLE_REG         ; Get IRQ0 base register address
;    LDR     r4, [r3,#0]                 ; Get IRQ0 enable register value

;    IF NU_CLMON_SUPPORT
;    BIC     r4,r4,#0x100                ; Clear CLMON interrupt enable bit
;    ENDIF

;    STMDB   sp!,{r4}                    ; Put the enable register value on the IRQ stack

;    LDR     r3, =IRQ_STATUS_REG          ;I_ISPR
	LDR		r3,	=0x4a000010				;INTPND
    LDR     r2, [r3, #0]
    LDR     r3, =INT_IRQ_Priority       ; Get the Priority table address

    IF NU_CLMON_SUPPORT
    BIC     r2,r2,#0x100                ; Clear CLMON receive interrupt
    ENDIF

IRQ_VECTOR_LOOP
    LDR     r0, [r3,#0]                 ; Load first vector to be checked from priority table
    MOV     r1, #1                      ; Build mask
    MOV     r1, r1, LSL r0              ; Use vector number to set mask to correct bit position

    TST     r1, r2                      ; Test if pending bit is set
    BNE     IRQ_VECTOR_FOUND            ; If bit is set, branch to found section...


;    BIC     r4,r4,r1                    ; Clear the enable bit to keep higher priority ints active
    ADD     r3, r3, #4                  ; Move to next word in the priority table
    LDR     r0, =IRQ_PRIORITY_END       ; Load the end address for the priority table
    CMP     r0, r3                      ; Make sure not at the end of the table (shouldn't happen!)
    BNE     IRQ_VECTOR_LOOP             ; Continue to loop if not at the end of the table

    ; No bits in pending register set, restore context and exit interrupt servicing
    ADD     sp,sp,#4                    ; Adjust sp above IRQ enable value
    LDMIA   sp!,{r0-r4}                 ; Restore r0-r4
    STMDB   sp!,{lr}
    LDMIA   sp!,{pc}^
    MOV     pc,lr                       ; return to the point of the exception

IRQ_VECTOR_FOUND

;    LDR     r3,=ICBASE                  ; Get IRQ0 base register address
;    STR     r4,[r3,#IRQ_CLEAR_OFFSET]   ; Disable all lower priority interrupts

    LDR     r3,=INT_IRQ_Vectors         ; Get IRQ vector table address
    MOV     r2, r0, LSL #2              ; Multiply vector by 4 to get offset into table
    ADD     r3, r3, r2                  ; Adjust vector table address to correct offset
    LDR     r2, [r3,#0]                 ; Load branch address from vector table

    MOV     PC, r2                      ; Jump to correct branch location based on vector table

;/* END: INT_IRQ */


;/*************************************************************************/
;/*                                                                       */
;/* FUNCTION                                                              */
;/*                                                                       */
;/*      INT_FIQ                                                          */
;/*                                                                       */
;/* DESCRIPTION                                                           */
;/*                                                                       */
;/*     This is a stub for the FIQ Interrupts                             */
;/*                                                                       */
;/*                                                                       */
;/* CALLED BY                                                             */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* CALLS                                                                 */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* INPUTS                                                                */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* OUTPUTS                                                               */
;/*                                                                       */
;/*      None                                                             */
;/*                                                                       */
;/* HISTORY                                                               */
;/*                                                                       */
;/*         NAME            DATE                    REMARKS               */
;/*                                                                       */
;/*                                                                       */
;/*************************************************************************/
    EXPORT  INT_FIQ
INT_FIQ
    IF NU_INT_FIQ_DEMO

    STMDB   sp!, {r1}
    MRS     r1, SPSR
    TST     r1, #FBIT                       ; If F bit = 1 we need to exit
    LDMIA   sp!, {r1}
    SUBNES  pc, lr, #4
;
;/* End ARM7 Fix */

    SUB     lr,lr,#4                    ; Adjust the return address
    STMDB   sp!,{r0-r7,lr}              ; Save all on temporary FIQ stack

    BL      FIQ_LISR                    ; Branch to FIQ service routine

    LDMIA   sp!,{r0-r7,pc}^             ; return to point of interrupt
    
    ELSE

    B    INT_FIQ

    ENDIF

;/*************************************************************************/
;/*                                                                       */
;/* FUNCTION                                                              */
;/*                                                                       */
;/*     INT_Interrupt_Shell                                               */
;/*                                                                       */
;/* DESCRIPTION                                                           */
;/*                                                                       */
;/*     Handles all interrupts which use NU_Register_LISR.                */
;/*                                                                       */
;/*                                                                       */
;/* CALLED BY                                                             */
;/*                                                                       */
;/*      INT_IRQ                                                          */
;/*                                                                       */
;/* CALLS                                                                 */
;/*                                                                       */
;/*      TCT_Dispatch_LISR                                                */
;/*      TCT_Interrupt_Context_Restore                                    */
;/*                                                                       */
;/* INPUTS                                                                */
;/*                                                                       */
;/*      vector (register r0)                                             */
;/*                                                                       */
;/* OUTPUTS                                                               */
;/*                                                                       */
;/*      None                                                             */
;/*************************************************************************/
INT_Interrupt_Shell
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;    LDR     R2,=0x1E00024
;    STR     R1,[R2]                         ;clear the interrupt source
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;