📄 int_pid.s
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EXPORT __START ; Defined to ensure that C runtime
__START ; system is not linked in!
ENTRY
EXPORT INT_Initialize
INT_Initialize
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear the mode bits
ORR r0,r0,#SUP_MODE ; Set the supervisor mode bits
ORR r0,r0,#LOCKOUT ; Insure IRQ/FIQ interrupts are
; locked out
MSR CPSR_cxsf,r0 ; Setup the new CPSR
ELSE
EXPORT INT_Initialize
INT_Initialize
ENDIF
IF NU_ARM9_SUPPORT
BL Initialise940 ; MMU initialization for ARM940T
; daughtercard supplied by ARM
ENDIF
; /* Initialize memory values. Any intial values for any intialized
; variables are copied from ROM to RAM. In addition, this code
; clears the un-initialized global and static C data areas.
; Please see ARM User Guide Chapter 13, Writing Code for ROM
; for more details. */
LDR r0,ROM_Data_Start_Ptr ; Get the start of the
LDR r1,RAM_Start_Ptr ; Get the start of the
LDR r3,BSS_Start_Ptr ; Pickup the start of
CMP r0,r1 ; Check for any initial
; variable values
BEQ INT_BSS_Clear ; If none, zero memory
INT_ROM_Vars_Copy
CMP r1,r3 ; Check to set flags
LDRCC r2, [r0], #4 ; Get value from ROM
STRCC r2, [r1], #4 ; Put value in RAM
BCC INT_ROM_Vars_Copy ; Continue
INT_BSS_Clear
LDR r1,BSS_End_Ptr ; Pickup the end of the BSS area
MOV r2,#0 ; Clear value in r2
INT_BSS_Clear_Loop
CMP r3,r1 ; Are the start and end equal?
STRCC r2,[r3],#4 ; Clear a word
BCC INT_BSS_Clear_Loop ; If so, continue with BSS clear
; /* Setup the vectors loaded flag to indicate to other routines in the
; system whether or not all of the default vectors have been loaded.
; If INT_Loaded_Flag is 1, all of the default vectors have been loaded.
; Otherwise, if INT_Loaded_Flag is 0, registering an LISR cause the
; default vector to be loaded. In the ARM60 this variable is always
; set to 1. All vectors must be setup by this function. */
; INT_Loaded_Flag = 1;
;
MOV r0,#1 ; All vectors are assumed loaded
LDR r1,Loaded_Flag ; Build address of loaded flag
STR r0,[r1,#0] ; Initialize loaded flag
; /* Initialize the system stack pointers. This is done after the BSS is
; clear because the TCD_System_Stack pointer is a BSS variable! It is
; assumed that available memory starts immediately after the end of the
; BSS section. */
;
LDR r0,BSS_End_Ptr ; Pickup the ending address of BSS
MOV r1,#SYSTEM_SIZE ; Pickup system stack size
SUB r1,r1,#4 ; Subtract one word for first addr
ADD r2,r0,r1 ; Build start of system stack area
BIC r2,r2,#3 ; Insure word aligment of stack
MOV r10,r0 ; Setup initial stack limit
LDR r3,System_Limit ; Pickup sys stack limit addr
STR r10,[r3, #0] ; Save stack limit
MOV sp,r2 ; Setup initial stack pointer
LDR r3,System_Stack ; Pickup system stack address
STR sp,[r3, #0] ; Save stack pointer
MOV r1,#IRQ_STACK_SIZE ; Pickup IRQ stack size in bytes
ADD r2,r2,r1 ; Allocate IRQ stack area
BIC r2,r2,#3 ; Insure word alignment
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear the mode bits
ORR r0,r0,#IRQ_MODE ; Set the IRQ mode bits
MSR CPSR_cxsf,r0 ; Move to IRQ mode
MOV sp,r2 ; Setup IRQ stack pointer
MOV r1,#FIQ_STACK_SIZE ; Pickup FIQ stack size in bytes
ADD r2,r2,r1 ; Allocate FIQ stack area
BIC r2,r2,#3 ; Insure word alignment
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear the mode bits
ORR r0,r0,#FIQ_MODE ; Set the FIQ mode bits
MSR CPSR_cxsf,r0 ; Move to the FIQ mode
MOV sp,r2 ; Setup FIQ stack pointer
MRS r0,CPSR ; Pickup current CPSR
BIC r0,r0,#MODE_MASK ; Clear mode bits
ORR r0,r0,#SUP_MODE ; Set the supervisor mode bits
MSR CPSR_cxsf,r0 ; All interrupt stacks are setup,
; return to supervisor mode
; /* Define the global data structures that need to be initialized by this
; routine. These structures are used to define the system timer
; management HISR. */
; TMD_HISR_Stack_Ptr = (VOID *) r2;
; TMD_HISR_Stack_Size = TIMER_SIZE;
; TMD_HISR_Priority = TIMER_PRIORITY;
LDR r3,HISR_Stack_Ptr ; Pickup variable's address
ADD r2,r2,#4 ; Increment to next available word
STR r2,[r3, #0] ; Setup timer HISR stack pointer
MOV r1,#TIMER_SIZE ; Pickup the timer HISR stack size
BIC r1,r1,#3 ; Insure word alignment
ADD r2,r2,r1 ; Allocate the timer HISR stack
; from available memory
LDR r3,HISR_Stack_Size ; Pickup variable's address
STR r1,[r3, #0] ; Setup timer HISR stack size
MOV r1,#TIMER_PRIORITY ; Pickup timer HISR priority (0-2)
LDR r3,HISR_Priority ; Pickup variable's address
STR r1,[r3, #0] ; Setup timer HISR priority
; /* Make a call to begin all board specific initialization.
; Begin with Initializing the Vector table and replacing
; default interrupts with Plus IRQs. Then setup the timer
; and begin the system clock */
IF NU_CLMON_SUPPORT
BL INT_Install_CLMON_Vector
ELSE
BL INT_Install_Vector_Table
ENDIF ;/* NU_CLMON_SUPPORT */
BL INT_Timer_Initialize ;/*the function can be write in c*/
;
; /* Call INC_Initialize with a pointer to the first available memory
; address after the compiler's global data. This memory may be used
; by the application. */
; INC_Initialize(first_available_memory);
;
MOV r0,r2 ; Pass the first available memory
LDR r3,=INC_Initialize ; to high-level initialization
BX r3
;}
;
;
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* INT_Vectors_Loaded */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function returns the flag that indicates whether or not */
;/* all the default vectors have been loaded. If it is false, */
;/* each LISR register also loads the ISR shell into the actual */
;/* vector table. */
;/* */
;/* */
;/* CALLED BY */
;/* */
;/* TCC_Register_LISR Register LISR for vector */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* INPUTS */
;/* */
;/* None */
;/* */
;/* OUTPUTS */
;/* */
;/* None */
;/* */
;/* HISTORY */
;/* */
;/* NAME DATE REMARKS */
;/* */
;/* B. Sellew 12-18-1995 Created initial version 1.0 */
;/* B. Sellew 12-20-1995 Verified version 1.0 */
;/* D. Driscoll 05-10-2001 Implemented working version. */
;/* */
;/*************************************************************************/
;INT INT_Vectors_Loaded(void)
;{
EXPORT INT_Vectors_Loaded
INT_Vectors_Loaded
;
; /* Just return the loaded vectors flag. */
; return(INT_Loaded_Flag);
;
LDR r1, Loaded_Flag ; Load the address of the Loaded_Flag
LDR r0, [r1, #0] ; Put the value of the Loaded_Flag in
; the return register
BX lr ; Return to caller
;}
;
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* INT_Setup_Vector */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function sets up the specified vector with the new vector */
;/* value. The previous vector value is returned to the caller. */
;/* */
;/* */
;/* CALLED BY */
;/* */
;/* Application */
;/* TCC_Register_LISR Register LISR for vector */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* INPUTS */
;/* */
;/* vector Vector number to setup */
;/* new Pointer to new assembly */
;/* language ISR */
;/* */
;/* OUTPUTS */
;/* */
;/* old vector contents */
;/* */
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