📄 int_pid.s
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DCD INT_Interrupt_Shell ; Vector 2
DCD INT_Interrupt_Shell ; Vector 4
DCD INT_Interrupt_Shell ; Vector 3
DCD INT_Interrupt_Shell ; Vector 5
DCD INT_Interrupt_Shell ; Vector 6
DCD INT_Interrupt_Shell ; Vector 7
DCD INT_Interrupt_Shell ; Vector 8
DCD INT_Interrupt_Shell ; Vector 9
DCD INT_Timer_Interrupt ; Vector 10
DCD INT_Interrupt_Shell ; Vector 11
DCD INT_Interrupt_Shell ; Vector 12
DCD INT_Interrupt_Shell ; Vector 13
DCD INT_Interrupt_Shell ; Vector 14
DCD INT_Interrupt_Shell ; Vector 15
DCD INT_Interrupt_Shell ; Vector 16
DCD INT_Interrupt_Shell ; Vector 17
DCD INT_Interrupt_Shell ; Vector 18
DCD INT_Interrupt_Shell ; Vector 19
DCD INT_Interrupt_Shell ; Vector 20
DCD INT_Interrupt_Shell ; Vector 21
DCD INT_Interrupt_Shell ; Vector 22
DCD INT_Interrupt_Shell ; Vector 23
DCD INT_Interrupt_Shell ; Vector 24
DCD INT_Interrupt_Shell ; Vector 25
DCD INT_Interrupt_Shell ; Vector 26
DCD INT_Interrupt_Shell ; Vector 27
DCD INT_Interrupt_Shell ; Vector 28
DCD INT_Interrupt_Shell ; Vector 29
DCD INT_Interrupt_Shell ; Vector 30
DCD INT_Interrupt_Shell ; Vector 31
DCD INT_Interrupt_Shell ; Vector 32
;
; Define the order in which the interrupts will be executed by software (INT_IRQ)
;
;INT_IRQ_Priority
; DCD IRQ_TIMER0_VECTOR ; First Interrupt serviced in INT_IRQ
; DCD IRQ_EINT0_VECTOR ;
; DCD IRQ_EINT1_VECTOR ;
; DCD IRQ_EINT2_VECTOR ;
; DCD IRQ_EINT3_VECTOR ;
; DCD IRQ_EINT4567_VECTOR ;
; DCD IRQ_TICK_VECTOR ;
; DCD IRQ_ZDMA0_VECTOR ;
; DCD IRQ_ZDMA1_VECTOR ;
; DCD IRQ_BDMA0_VECTOR ;
; DCD IRQ_BDMA1_VECTOR ;
; DCD IRQ_WDT_VECTOR ;
; DCD IRQ_UERR01_VECTOR ;
; DCD IRQ_TIMER1_VECTOR ;
; DCD IRQ_TIMER2_VECTOR ;
; DCD IRQ_TIMER3_VECTOR ;
; DCD IRQ_TIMER4_VECTOR ;
; DCD IRQ_TIMER5_VECTOR ;
; DCD IRQ_URXD0_VECTOR ;
; DCD IRQ_URXD1_VECTOR ;
; DCD IRQ_IIC_VECTOR ;
; DCD IRQ_UTXD0_VECTOR ;
; DCD IRQ_UTXD1_VECTOR ;
; DCD IRQ_RTC_VECTOR ;
; DCD IRQ_ADC_VECTOR ; Last Interrupt serviced in INT_IRQ
;IRQ_PRIORITY_END
INT_IRQ_Priority
DCD IRQ_EINT0_VECTOR
DCD IRQ_EINT1_VECTOR
DCD IRQ_EINT2_VECTOR
DCD IRQ_EINT3_VECTOR
DCD IRQ_EINT4_7_VECTOR
DCD IRQ_EINT8_23_VECTOR
DCD IRQ_Reserved_6_VECTOR
DCD IRQ_nBATT_FLT_VECTOR
DCD IRQ_TICK_VECTOR
DCD IRQ_WDT_VECTOR
DCD IRQ_TIMER0_VECTOR
DCD IRQ_TIMER1_VECTOR
DCD IRQ_TIMER2_VECTOR
DCD IRQ_TIMER4_VECTOR
DCD IRQ_TIMER3_VECTOR
DCD IRQ_UART2_VECTOR
DCD IRQ_LCD_VECTOR
DCD IRQ_DMA0_VECTOR
DCD IRQ_DMA1_VECTOR
DCD IRQ_DMA2_VECTOR
DCD IRQ_DMA3_VECTOR
DCD IRQ_SDI_VECTOR
DCD IRQ_SPI0_VECTOR
DCD IRQ_UART1_VECTOR
DCD IRQ_Reserved_24_VECTOR
DCD IRQ_USBD_VECTOR
DCD IRQ_USBH_VECTOR
DCD IRQ_IIC_VECTOR
DCD IRQ_UART0_VECTOR
DCD IRQ_SPI1_VECTOR
DCD IRQ_RTC_VECTOR
DCD IRQ_ADC_VECTOR
IRQ_PRIORITY_END
;/*************************************************************************/
;/* LOCAL VARIABLE DECLARATIONS */
;/*************************************************************************/
AREA INT_CODE, CODE, READONLY
;/* Define the ARM7 interrupt vector table, INT_Vectors. This table is
; assumed to be loaded or copied to address 0. If coexistence with a
; target-resident-monitor program is required, it is important to only
; copy the necessory vectors in this table into the actual table.
; The idea is to not mess with the monitor's vectors.
; NOTE:
; When running from FLASH, this vector table will not be used. The vector
; table located in INT_ROM.S is the vector table used in this set-up */
IF (:LNOT: NU_INT_ROM_SUPPORT) ; If running from FLASH, don't need
; to re-install the vector table
EXPORT INT_Vectors
INT_Vectors
LDR pc,INT_Initialize_Addr
LDR pc,Undef_Instr_Addr
LDR pc,SWI_Addr
LDR pc,Prefetch_Abort_Addr
LDR pc,Data_Abort_Addr
LDR pc,Reserved_Addr
LDR pc,IRQ_Handler_Addr
LDR pc,FIQ_Handler_Addr
INT_Vectors_Addresses
INT_Initialize_Addr DCD INT_Initialize
Undef_Instr_Addr DCD INT_Undef_Inst
SWI_Addr DCD INT_Software
Prefetch_Abort_Addr DCD INT_Prefetch_Abort
Data_Abort_Addr DCD INT_Data_Abort
Reserved_Addr DCD INT_Reserved
IRQ_Handler_Addr DCD INT_IRQ
FIQ_Handler_Addr DCD INT_FIQ
ENDIF ;/* :LNOT: NU_INT_ROM_SUPPORT */
BSS_Start_Ptr
IMPORT |Image$$ZI$$Base|
DCD |Image$$ZI$$Base|
BSS_End_Ptr
IMPORT |Image$$ZI$$Limit|
DCD |Image$$ZI$$Limit|
ROM_Data_Start_Ptr
IMPORT |Image$$RO$$Limit|
DCD |Image$$RO$$Limit|
RAM_Start_Ptr
IMPORT |Image$$RW$$Base|
DCD |Image$$RW$$Base|
Loaded_Flag
DCD INT_Loaded_Flag
HISR_Stack_Ptr
DCD TMD_HISR_Stack_Ptr
HISR_Stack_Size
DCD TMD_HISR_Stack_Size
HISR_Priority
DCD TMD_HISR_Priority
System_Stack
DCD TCD_System_Stack
System_Limit
DCD TCT_System_Limit
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR r0,=bottom_of_heap
MOV pc,lr
;/* end test stuff for heap */
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* INT_Initialize */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function sets up the global system stack variable and */
;/* transfers control to the target independent initialization */
;/* function INC_Initialize. Responsibilities of this function */
;/* include the following: */
;/* */
;/* - Setup necessary processor/system control registers */
;/* - Initialize the vector table */
;/* - Setup the system stack pointers */
;/* - Setup the timer interrupt */
;/* - Calculate the timer HISR stack and priority */
;/* - Calculate the first available memory address */
;/* - Transfer control to INC_Initialize to initialize all of */
;/* the system components. */
;/* */
;/* CALLED BY */
;/* */
;/* Nothing. This function is the ENTRY point for Nucleus PLUS */
;/* when running from RAM. */
;/* */
;/* CALLS */
;/* */
;/* INC_Initialize Common initialization */
;/* */
;/* INPUTS */
;/* */
;/* None */
;/* */
;/* OUTPUTS */
;/* */
;/* None */
;/* */
;/* HISTORY */
;/* */
;/* NAME DATE REMARKS */
;/* */
;/* W. Lamie 08-27-1994 Created initial version 1.0 */
;/* D. Lamie 08-27-1994 Verified version 1.0 */
;/* */
;/*************************************************************************/
;VOID INT_Initialize(void)
;{
;
;/* Define entry point for the Linker */
;
;/* If not running from flash, this will be the entry point and the code
; necessary to change mode to the supervisor mode and lock-out interrupts
; is executed here. If running from flash, the entry point will be in
; INT_ROM.S and changing modes and locking out interrupts occurs there. */
IF (:LNOT: NU_INT_ROM_SUPPORT)
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