📄 opgen.py
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#!/bin/env pythonimport osimport sysimport stringfrom xml.dom import minidom## opgen.py -- generates tables and constants for decoding## - itab.c# - itab.h### special mnemonic types for internal purposes.#spl_mnm_types = [ 'd3vil', \ 'na', \ 'grp_reg', \ 'grp_rm', \ 'grp_vendor', \ 'grp_x87', \ 'grp_mode', \ 'grp_osize', \ 'grp_asize', \ 'grp_mod', \ 'grp_3byte', \ 'none' \ ]## opcode-vendor dictionary# vend_dict = { 'AMD' : '00', 'INTEL' : '01', 'ANY' : '02'}## opcode-mode dictionary#mode_dict = { '16' : '00', '32' : '01', '64' : '02' }## opcode-operand dictionary#operand_dict = { "Ap" : [ "OP_A" , "SZ_P" ], "E" : [ "OP_E" , "SZ_NA" ], "Eb" : [ "OP_E" , "SZ_B" ], "Ew" : [ "OP_E" , "SZ_W" ], "Ev" : [ "OP_E" , "SZ_V" ], "Ed" : [ "OP_E" , "SZ_D" ], "Eq" : [ "OP_E" , "SZ_Q" ], "Ez" : [ "OP_E" , "SZ_Z" ], "Ex" : [ "OP_E" , "SZ_MDQ" ], "Ep" : [ "OP_E" , "SZ_P" ], "G" : [ "OP_G" , "SZ_NA" ], "Gb" : [ "OP_G" , "SZ_B" ], "Gw" : [ "OP_G" , "SZ_W" ], "Gv" : [ "OP_G" , "SZ_V" ], "Gvw" : [ "OP_G" , "SZ_MDQ" ], "Gd" : [ "OP_G" , "SZ_D" ], "Gq" : [ "OP_G" , "SZ_Q" ], "Gx" : [ "OP_G" , "SZ_MDQ" ], "Gz" : [ "OP_G" , "SZ_Z" ], "M" : [ "OP_M" , "SZ_NA" ], "Mb" : [ "OP_M" , "SZ_B" ], "Mw" : [ "OP_M" , "SZ_W" ], "Ms" : [ "OP_M" , "SZ_W" ], "Md" : [ "OP_M" , "SZ_D" ], "Mq" : [ "OP_M" , "SZ_Q" ], "Mt" : [ "OP_M" , "SZ_T" ], "Mo" : [ "OP_M" , "SZ_O" ], "I1" : [ "OP_I1" , "SZ_NA" ], "I3" : [ "OP_I3" , "SZ_NA" ], "Ib" : [ "OP_I" , "SZ_B" ], "Isb" : [ "OP_I" , "SZ_SB" ], "Iw" : [ "OP_I" , "SZ_W" ], "Iv" : [ "OP_I" , "SZ_V" ], "Iz" : [ "OP_I" , "SZ_Z" ], "Jv" : [ "OP_J" , "SZ_V" ], "Jz" : [ "OP_J" , "SZ_Z" ], "Jb" : [ "OP_J" , "SZ_B" ], "R" : [ "OP_R" , "SZ_RDQ" ], "C" : [ "OP_C" , "SZ_NA" ], "D" : [ "OP_D" , "SZ_NA" ], "S" : [ "OP_S" , "SZ_NA" ], "Ob" : [ "OP_O" , "SZ_B" ], "Ow" : [ "OP_O" , "SZ_W" ], "Ov" : [ "OP_O" , "SZ_V" ], "V" : [ "OP_V" , "SZ_NA" ], "W" : [ "OP_W" , "SZ_NA" ], "P" : [ "OP_P" , "SZ_NA" ], "Q" : [ "OP_Q" , "SZ_NA" ], "VR" : [ "OP_VR" , "SZ_NA" ], "PR" : [ "OP_PR" , "SZ_NA" ], "AL" : [ "OP_AL" , "SZ_NA" ], "CL" : [ "OP_CL" , "SZ_NA" ], "DL" : [ "OP_DL" , "SZ_NA" ], "BL" : [ "OP_BL" , "SZ_NA" ], "AH" : [ "OP_AH" , "SZ_NA" ], "CH" : [ "OP_CH" , "SZ_NA" ], "DH" : [ "OP_DH" , "SZ_NA" ], "BH" : [ "OP_BH" , "SZ_NA" ], "AX" : [ "OP_AX" , "SZ_NA" ], "CX" : [ "OP_CX" , "SZ_NA" ], "DX" : [ "OP_DX" , "SZ_NA" ], "BX" : [ "OP_BX" , "SZ_NA" ], "SI" : [ "OP_SI" , "SZ_NA" ], "DI" : [ "OP_DI" , "SZ_NA" ], "SP" : [ "OP_SP" , "SZ_NA" ], "BP" : [ "OP_BP" , "SZ_NA" ], "eAX" : [ "OP_eAX" , "SZ_NA" ], "eCX" : [ "OP_eCX" , "SZ_NA" ], "eDX" : [ "OP_eDX" , "SZ_NA" ], "eBX" : [ "OP_eBX" , "SZ_NA" ], "eSI" : [ "OP_eSI" , "SZ_NA" ], "eDI" : [ "OP_eDI" , "SZ_NA" ], "eSP" : [ "OP_eSP" , "SZ_NA" ], "eBP" : [ "OP_eBP" , "SZ_NA" ], "rAX" : [ "OP_rAX" , "SZ_NA" ], "rCX" : [ "OP_rCX" , "SZ_NA" ], "rBX" : [ "OP_rBX" , "SZ_NA" ], "rDX" : [ "OP_rDX" , "SZ_NA" ], "rSI" : [ "OP_rSI" , "SZ_NA" ], "rDI" : [ "OP_rDI" , "SZ_NA" ], "rSP" : [ "OP_rSP" , "SZ_NA" ], "rBP" : [ "OP_rBP" , "SZ_NA" ], "ES" : [ "OP_ES" , "SZ_NA" ], "CS" : [ "OP_CS" , "SZ_NA" ], "DS" : [ "OP_DS" , "SZ_NA" ], "SS" : [ "OP_SS" , "SZ_NA" ], "GS" : [ "OP_GS" , "SZ_NA" ], "FS" : [ "OP_FS" , "SZ_NA" ], "ST0" : [ "OP_ST0" , "SZ_NA" ], "ST1" : [ "OP_ST1" , "SZ_NA" ], "ST2" : [ "OP_ST2" , "SZ_NA" ], "ST3" : [ "OP_ST3" , "SZ_NA" ], "ST4" : [ "OP_ST4" , "SZ_NA" ], "ST5" : [ "OP_ST5" , "SZ_NA" ], "ST6" : [ "OP_ST6" , "SZ_NA" ], "ST7" : [ "OP_ST7" , "SZ_NA" ], "NONE" : [ "OP_NONE" , "SZ_NA" ], "ALr8b" : [ "OP_ALr8b" , "SZ_NA" ], "CLr9b" : [ "OP_CLr9b" , "SZ_NA" ], "DLr10b" : [ "OP_DLr10b" , "SZ_NA" ], "BLr11b" : [ "OP_BLr11b" , "SZ_NA" ], "AHr12b" : [ "OP_AHr12b" , "SZ_NA" ], "CHr13b" : [ "OP_CHr13b" , "SZ_NA" ], "DHr14b" : [ "OP_DHr14b" , "SZ_NA" ], "BHr15b" : [ "OP_BHr15b" , "SZ_NA" ], "rAXr8" : [ "OP_rAXr8" , "SZ_NA" ], "rCXr9" : [ "OP_rCXr9" , "SZ_NA" ], "rDXr10" : [ "OP_rDXr10" , "SZ_NA" ], "rBXr11" : [ "OP_rBXr11" , "SZ_NA" ], "rSPr12" : [ "OP_rSPr12" , "SZ_NA" ], "rBPr13" : [ "OP_rBPr13" , "SZ_NA" ], "rSIr14" : [ "OP_rSIr14" , "SZ_NA" ], "rDIr15" : [ "OP_rDIr15" , "SZ_NA" ], "jWP" : [ "OP_J" , "SZ_WP" ], "jDP" : [ "OP_J" , "SZ_DP" ],}## opcode prefix dictionary# pfx_dict = { "aso" : "P_aso", "oso" : "P_oso", "rexw" : "P_rexw", "rexb" : "P_rexb", "rexx" : "P_rexx", "rexr" : "P_rexr", "inv64" : "P_inv64", "def64" : "P_def64", "depM" : "P_depM", "cast1" : "P_c1", "cast2" : "P_c2", "cast3" : "P_c3" }## globals#opr_constants = []siz_constants = []tables = {}table_sizes = {}mnm_list = []default_opr = 'O_NONE, O_NONE, O_NONE'## collect the operand/size constants# for o in operand_dict.keys(): if not (operand_dict[o][0] in opr_constants): opr_constants.append(operand_dict[o][0]) if not (operand_dict[o][1] in siz_constants): siz_constants.append(operand_dict[o][1])xmlDoc = minidom.parse(sys.argv[1])tlNode = xmlDoc.firstChild## look for top-level optable node#while tlNode and tlNode.localName != "x86optable": tlNode = tlNode.nextSibling## creates a table entry#def centry(i, defmap): if defmap["type"][0:3] == "grp": opr = default_opr mnm = 'UD_I' + defmap["type"].lower() pfx = defmap["name"].upper() elif defmap["type"] == "leaf": mnm = "UD_I" + defmap["name"] opr = defmap["opr"] pfx = defmap["pfx"] if len(mnm) == 0: mnm = "UD_Ina" if len(opr) == 0: opr = default_opr if len(pfx) == 0: pfx = "P_none" else: opr = default_opr pfx = "P_none" mnm = "UD_Iinvalid" return " /* %s */ { %-16s %-26s %s },\n" % (i, mnm + ',', opr + ',', pfx)## makes a new table and adds it to the global# list of tables#def mktab(name, size): if not (name in tables.keys()): tables[name] = {} table_sizes[name] = sizefor node in tlNode.childNodes: opcodes = [] iclass = '' vendor = '' # we are only interested in <instruction> if node.localName != 'instruction': continue # we need the mnemonic attribute if not ('mnemonic' in node.attributes.keys()): print "error: no mnemonic given in <instruction>." sys.exit(-1) # check if this instruction was already defined. # else add it to the global list of mnemonics mnemonic = node.attributes['mnemonic'].value if mnemonic in mnm_list: print "error: multiple declarations of mnemonic='%s'" % mnemonic; sys.exit(-1) else: mnm_list.append(mnemonic) # # collect instruction # - vendor # - class # for n in node.childNodes: if n.localName == 'vendor': vendor = (n.firstChild.data).strip(); elif n.localName == 'class': iclass = n.firstChild.data; # # for each opcode definition # for n in node.childNodes: if n.localName != 'opcode': continue; opcode = n.firstChild.data.strip(); parts = opcode.split(";"); flags = [] opr = [] pfx = [] opr = [] pfx_c = [] # get cast attribute, if given if 'cast' in n.attributes.keys(): pfx_c.append( "P_c" + n.attributes['cast'].value ) # get implicit addressing attribute, if given if 'imp_addr' in n.attributes.keys(): if int( n.attributes['imp_addr'].value ): pfx_c.append( "P_ImpAddr" ) # get mode attribute, if given if 'mode' in n.attributes.keys(): v = (n.attributes['mode'].value).strip() modef = v.split(); for m in modef: if not (m in pfx_dict): print "warning: unrecognized mode attribute '%s'" % m else: pfx_c.append(pfx_dict[m])
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