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📄 zhuangtaiji.fit.eqn

📁 这是一个最最常用的用vhdl写的状态机
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L39Q is z0~reg0 at LC6_B6
--operation mode is normal

A1L39Q_lut_out = !State.s0;
A1L39Q = DFFEA(A1L39Q_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L37Q is z0~7 at LC6_B6
--operation mode is normal

A1L37Q = A1L39Q;


--A1L42Q is z1~reg0 at LC6_B5
--operation mode is normal

A1L42Q_lut_out = State.s1;
A1L42Q = DFFEA(A1L42Q_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L41Q is z1~2 at LC6_B5
--operation mode is normal

A1L41Q = A1L42Q;


--A1L45Q is z2~reg0 at LC4_B5
--operation mode is normal

A1L45Q_lut_out = State.s2;
A1L45Q = DFFEA(A1L45Q_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L44Q is z2~2 at LC4_B5
--operation mode is normal

A1L44Q = A1L45Q;


--A1L48Q is z3~reg0 at LC5_B4
--operation mode is normal

A1L48Q_lut_out = State.s3;
A1L48Q = DFFEA(A1L48Q_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L47Q is z3~2 at LC5_B4
--operation mode is normal

A1L47Q = A1L48Q;


--A1L51Q is z4~reg0 at LC8_B4
--operation mode is normal

A1L51Q_lut_out = State.s4;
A1L51Q = DFFEA(A1L51Q_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L50Q is z4~2 at LC8_B4
--operation mode is normal

A1L50Q = A1L51Q;


--State.s0 is State.s0 at LC2_B6
--operation mode is normal

State.s0_lut_out = State.s0 # kb2 & qa;
State.s0 = DFFEA(State.s0_lut_out, GLOBAL(Clk), !GLOBAL(clr), , , , );

--A1L26Q is State.s0~7 at LC2_B6
--operation mode is normal

A1L26Q = State.s0;


--State.s1 is State.s1 at LC3_B5
--operation mode is normal

State.s1_lut_out = A1L19 # !State.s0 & kb2 & qa;
State.s1 = DFFEA(State.s1_lut_out, GLOBAL(Clk), !GLOBAL(clr), , , , );

--A1L28Q is State.s1~7 at LC3_B5
--operation mode is normal

A1L28Q = State.s1;


--State.s2 is State.s2 at LC1_B5
--operation mode is normal

State.s2_lut_out = A1L20 # qb & kb2 & State.s1;
State.s2 = DFFEA(State.s2_lut_out, GLOBAL(Clk), !GLOBAL(clr), , , , );

--A1L30Q is State.s2~7 at LC1_B5
--operation mode is normal

A1L30Q = State.s2;


--State.s3 is State.s3 at LC2_B4
--operation mode is normal

State.s3_lut_out = A1L21 # qc & kb2 & State.s2;
State.s3 = DFFEA(State.s3_lut_out, GLOBAL(Clk), !GLOBAL(clr), , , , );

--A1L32Q is State.s3~7 at LC2_B4
--operation mode is normal

A1L32Q = State.s3;


--State.s4 is State.s4 at LC3_B4
--operation mode is normal

State.s4_lut_out = State.s4 # qd & kb2 & State.s3;
State.s4 = DFFEA(State.s4_lut_out, GLOBAL(Clk), !GLOBAL(clr), , , , );

--A1L34Q is State.s4~14 at LC3_B4
--operation mode is normal

A1L34Q = State.s4;


--qa is qa at LC1_B6
--operation mode is normal

qa_lut_out = !State.s0 & (qa # A1L7);
qa = DFFEA(qa_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L12Q is qa~77 at LC1_B6
--operation mode is normal

A1L12Q = qa;


--qb is qb at LC5_B5
--operation mode is normal

qb_lut_out = State.s1 & (A1L7 # qb);
qb = DFFEA(qb_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L14Q is qb~77 at LC5_B5
--operation mode is normal

A1L14Q = qb;


--A1L19 is Select~184 at LC7_B5
--operation mode is normal

A1L19 = State.s1 & (!kb2 # !qb);

--A1L22 is Select~191 at LC7_B5
--operation mode is normal

A1L22 = State.s1 & (!kb2 # !qb);


--qc is qc at LC2_B5
--operation mode is normal

qc_lut_out = State.s2 & (A1L7 # qc);
qc = DFFEA(qc_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L16Q is qc~77 at LC2_B5
--operation mode is normal

A1L16Q = qc;


--A1L20 is Select~186 at LC8_B5
--operation mode is normal

A1L20 = State.s2 & (!kb2 # !qc);

--A1L23 is Select~192 at LC8_B5
--operation mode is normal

A1L23 = State.s2 & (!kb2 # !qc);


--qd is qd at LC4_B4
--operation mode is normal

qd_lut_out = State.s3 & (A1L8 # qd);
qd = DFFEA(qd_lut_out, GLOBAL(Clk), , , A1L36, , );

--A1L18Q is qd~37 at LC4_B4
--operation mode is normal

A1L18Q = qd;


--A1L21 is Select~188 at LC6_B4
--operation mode is normal

A1L21 = State.s3 & (!kb2 # !qd);

--A1L24 is Select~193 at LC6_B4
--operation mode is normal

A1L24 = State.s3 & (!kb2 # !qd);


--A1L7 is process0~88 at LC1_B4
--operation mode is normal

A1L7 = !kb3 & !kb2 & (kb1 # kb0);

--A1L9 is process0~90 at LC1_B4
--operation mode is normal

A1L9 = !kb3 & !kb2 & (kb1 # kb0);


--A1L8 is process0~89 at LC7_B4
--operation mode is normal

A1L8 = !kb3 & !kb2;

--A1L10 is process0~91 at LC7_B4
--operation mode is normal

A1L10 = !kb3 & !kb2;


--A1L36 is z0~6 at LC3_B6
--operation mode is normal

A1L36 = !clr;

--A1L38 is z0~8 at LC3_B6
--operation mode is normal

A1L38 = !clr;


--Clk is Clk at PIN_55
--operation mode is input

Clk = INPUT();


--kb2 is kb2 at PIN_124
--operation mode is input

kb2 = INPUT();


--clr is clr at PIN_126
--operation mode is input

clr = INPUT();


--kb0 is kb0 at PIN_56
--operation mode is input

kb0 = INPUT();


--kb1 is kb1 at PIN_125
--operation mode is input

kb1 = INPUT();


--kb3 is kb3 at PIN_54
--operation mode is input

kb3 = INPUT();


--z0 is z0 at PIN_87
--operation mode is output

z0 = OUTPUT(A1L39Q);


--z1 is z1 at PIN_88
--operation mode is output

z1 = OUTPUT(A1L42Q);


--z2 is z2 at PIN_90
--operation mode is output

z2 = OUTPUT(A1L45Q);


--z3 is z3 at PIN_89
--operation mode is output

z3 = OUTPUT(A1L48Q);


--z4 is z4 at PIN_86
--operation mode is output

z4 = OUTPUT(A1L51Q);


--z5 is z5 at PIN_10
--operation mode is output

z5 = OUTPUT(GND);


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