📄 s5.mdl
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ExternalReset none
InitialConditionSource internal
InitialCondition "Psiqo"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Outport
Name "Out_psiq"
Position [460, 90, 480, 110]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_iq"
Position [665, 205, 685, 225]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_psimq"
Position [725, 130, 745, 150]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "Fcn5"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Out_psimq"
DstPort 1
}
Branch {
Points [95, 0; 0, -60; -585, 0; 0, 20]
DstBlock "Mux"
DstPort 1
}
Branch {
Points [95, 0; 0, 135; -230, 0; 0, -45]
DstBlock "Mux4"
DstPort 2
}
}
Line {
SrcBlock "Fcn4"
SrcPort 1
DstBlock "Out_iq"
DstPort 1
}
Line {
SrcBlock "psiq_"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Fcn5"
DstPort 1
}
Branch {
Points [10, 0; 0, -40]
DstBlock "Out_psiq"
DstPort 1
}
Branch {
Points [45, 0; 0, 55]
DstBlock "Mux4"
DstPort 1
}
Branch {
Points [10, 0; 0, 65; -320, 0; 0, -30]
DstBlock "Mux"
DstPort 4
}
}
Line {
SrcBlock "Mux4"
SrcPort 1
DstBlock "Fcn4"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psiq_"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "In_vq"
SrcPort 1
Points [20, 0; 0, 10]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "In_wrpsid"
SrcPort 1
Points [20, 0; 0, -20]
DstBlock "Mux"
DstPort 3
}
Annotation {
Position [647, 122]
VerticalAlignment top
Text "psimq"
}
}
}
Block {
BlockType Outport
Name "iq_motor"
Position [340, 85, 360, 105]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "id_motor"
Position [240, 310, 260, 330]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Tem"
Position [460, 245, 480, 265]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "wr/wb"
Position [460, 295, 480, 315]
Port "4"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "d_cct"
SrcPort 3
DstBlock "T1"
DstPort 1
}
Line {
SrcBlock "q_cct"
SrcPort 3
DstBlock "T"
DstPort 1
}
Line {
SrcBlock "Rotor"
SrcPort 1
DstBlock "Tem"
DstPort 1
}
Line {
SrcBlock "Rotor"
SrcPort 2
Points [0, 0]
Branch {
DstBlock "wr/wb"
DstPort 1
}
Branch {
Points [15, 0; 0, -105]
DstBlock "prod2"
DstPort 1
}
Branch {
Points [15, 0; 0, -150]
DstBlock "prod1"
DstPort 1
}
}
Line {
SrcBlock "prod2"
SrcPort 1
Points [-40, 0; 0, 75]
DstBlock "d_cct"
DstPort 2
}
Line {
SrcBlock "vd"
SrcPort 1
DstBlock "d_cct"
DstPort 1
}
Line {
SrcBlock "Ipm"
SrcPort 1
DstBlock "d_cct"
DstPort 3
}
Line {
SrcBlock "q_cct"
SrcPort 1
Points [0, 0]
Branch {
Points [55, 0; 0, 145]
DstBlock "prod2"
DstPort 2
}
Branch {
Points [55, 0; 0, 210]
DstBlock "Rotor"
DstPort 3
}
}
Line {
SrcBlock "d_cct"
SrcPort 1
Points [0, 0]
Branch {
Points [40, 0; 0, -95]
DstBlock "prod1"
DstPort 2
}
Branch {
DstBlock "Rotor"
DstPort 2
}
}
Line {
SrcBlock "vq"
SrcPort 1
DstBlock "q_cct"
DstPort 1
}
Line {
SrcBlock "prod1"
SrcPort 1
Points [-40, 0; 0, -45]
DstBlock "q_cct"
DstPort 2
}
Line {
SrcBlock "d_cct"
SrcPort 2
Points [0, 0]
Branch {
Points [25, 0; 0, 35]
DstBlock "id_motor"
DstPort 1
}
Branch {
Points [25, 0; 0, 15]
DstBlock "Rotor"
DstPort 4
}
}
Line {
SrcBlock "q_cct"
SrcPort 2
Points [0, 0]
Branch {
DstBlock "iq_motor"
DstPort 1
}
Branch {
Points [90, 0; 0, 145]
DstBlock "Rotor"
DstPort 1
}
}
Line {
SrcBlock "Tmech"
SrcPort 1
DstBlock "Rotor"
DstPort 5
}
Annotation {
Position [217, 57]
VerticalAlignment top
Text "psiq"
}
Annotation {
Position [212, 82]
VerticalAlignment top
Text "iq"
}
Annotation {
Position [207, 272]
VerticalAlignment top
Text "id"
}
Annotation {
Position [207, 247]
VerticalAlignment top
Text "psid"
}
}
}
Block {
BlockType SubSystem
Name "qdr2abc"
Position [875, 165, 915, 245]
ShowPortLabels off
System {
Name "qdr2abc"
Location [56, 346, 800, 637]
Open off
ScreenColor white
Block {
BlockType Inport
Name "iq"
Position [60, 125, 80, 145]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "id"
Position [60, 165, 80, 185]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "cos_thetar"
Position [60, 45, 80, 65]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "sin_thetar"
Position [60, 85, 80, 105]
Port "4"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Mux
Name "Mux"
Position [125, 34, 155, 196]
Inputs "4"
}
Block {
BlockType Mux
Name "Mux1"
Position [355, 38, 385, 187]
Inputs "2"
}
Block {
BlockType Fcn
Name "qdr2ds"
Position [190, 140, 310, 160]
Expr "u[1]*u[4] - u[2]*u[3]"
}
Block {
BlockType Fcn
Name "qdr2qs"
Position [190, 64, 310, 86]
Expr "u[1]*u[3] + u[2]*u[4]"
}
Block {
BlockType Fcn
Name "qds2a"
Position [435, 44, 605, 66]
Expr "u[1] "
}
Block {
BlockType Fcn
Name "qds2b"
Position [435, 104, 600, 126]
Expr "-u[1]/2 -sqrt(3)*u[2]/2 "
}
Block {
BlockType Fcn
Name "qds2c"
Position [435, 159, 605, 181]
Expr "-u[1]/2 +sqrt(3)*u[2]/2 "
}
Block {
BlockType Outport
Name "ia"
Position [645, 44, 670, 66]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "ib"
Position [645, 104, 670, 126]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "ic"
Position [650, 158, 675, 182]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "qds2c"
SrcPort 1
DstBlock "ic"
DstPort 1
}
Line {
SrcBlock "qds2b"
SrcPort 1
DstBlock "ib"
DstPort 1
}
Line {
SrcBlock "qds2a"
SrcPort 1
DstBlock "ia"
DstPort 1
}
Line {
SrcBlock "Mux1"
SrcPort 1
Points [0, 0]
Branch {
Points [30, 0]
DstBlock "qds2c"
DstPort 1
}
Branch {
Points [30, 0]
DstBlock "qds2a"
DstPort 1
}
Branch {
DstBlock "qds2b"
DstPort 1
}
}
Line {
SrcBlock "qdr2ds"
SrcPort 1
DstBlock "Mux1"
DstPort 2
}
Line {
SrcBlock "qdr2qs"
SrcPort 1
DstBlock "Mux1"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [5, 0; 0, 35]
DstBlock "qdr2ds"
DstPort 1
}
Branch {
Points [5, 0; 0, -40]
DstBlock "qdr2qs"
DstPort 1
}
}
Line {
SrcBlock "id"
SrcPort 1
DstBlock "Mux"
DstPort 4
}
Line {
SrcBlock "iq"
SrcPort 1
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "sin_thetar"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "cos_thetar"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Annotation {
Position [332, 132]
VerticalAlignment top
Text "ids"
}
Annotation {
Position [332, 62]
VerticalAlignment top
Text "iqs"
}
Annotation {
Position [532, 27]
VerticalAlignment top
Text "qds2abc"
}
Annotation {
Position [257, 22]
VerticalAlignment top
Text "qdr2qds"
}
}
}
Block {
BlockType SubSystem
Name "qdr2abc1"
Position [390, 167, 425, 238]
ShowPortLabels off
System {
Name "qdr2abc1"
Location [56, 346, 800, 637]
Open off
ScreenColor white
Block {
BlockType Inport
Name "iq"
Position [60, 125, 80, 145]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "id"
Position [60, 165, 80, 185]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "cos(thetar)"
Position [60, 45, 80, 65]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "sin(thetar)"
Position [60, 85, 80, 105]
Port "4"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Mux
Name "Mux"
Position [125, 34, 155, 196]
Inputs "4"
}
Block {
BlockType Mux
Name "Mux1"
Position [350, 38, 380, 187]
Inputs "2"
}
Block {
BlockType Fcn
Name "qdr2ds"
Position [190, 140, 310, 160]
Expr "u[1]*u[4] - u[2]*u[3]"
}
Block {
BlockType Fcn
Name "qdr2qs"
Position [190, 64, 310, 86]
Expr "u[1]*u[3] + u[2]*u[4]"
}
Block {
BlockType Fcn
Name "qds2a"
Position [440, 49, 610, 71]
Expr "u[1] "
}
Block {
BlockType Fcn
Name "qds2b"
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